1.. zephyr:board:: frdm_mcxn947
2
3Overview
4********
5
6FRDM-MCXN947 are compact and scalable development boards for rapid prototyping of
7MCX N94 and N54 MCUs. They offer industry standard headers for easy access to the
8MCUs I/Os, integrated open-standard serial interfaces, external flash memory and
9an on-board MCU-Link debugger. MCX N Series are high-performance, low-power
10microcontrollers with intelligent peripherals and accelerators providing multi-tasking
11capabilities and performance efficiency.
12
13Hardware
14********
15
16- MCX-N947 Dual Arm Cortex-M33 microcontroller running at 150 MHz
17- 2MB dual-bank on chip Flash
18- 512 KB RAM
19- External Quad SPI flash over FlexSPI
20- USB high-speed (Host/Device) with on-chip HS PHY. HS USB Type-C connectors
21- 10x LP Flexcomms each supporting SPI, I2C, UART
22- 2x FlexCAN with FD, 2x I3Cs, 2x SAI
23- 1x Ethernet with QoS
24- On-board MCU-Link debugger with CMSIS-DAP
25- Arduino Header, FlexIO/LCD Header, SmartDMA/Camera Header, mikroBUS
26
27For more information about the MCX-N947 SoC and FRDM-MCXN947 board, see:
28
29- `MCX-N947 SoC Website`_
30- `MCX-N947 Datasheet`_
31- `MCX-N947 Reference Manual`_
32- `FRDM-MCXN947 Website`_
33- `FRDM-MCXN947 User Guide`_
34- `FRDM-MCXN947 Board User Manual`_
35- `FRDM-MCXN947 Schematics`_
36
37Supported Features
38==================
39
40The FRDM-MCXN947 board configuration supports the following hardware features:
41
42+-----------+------------+-------------------------------------+
43| Interface | Controller | Driver/Component                    |
44+===========+============+=====================================+
45| NVIC      | on-chip    | nested vector interrupt controller  |
46+-----------+------------+-------------------------------------+
47| SYSTICK   | on-chip    | systick                             |
48+-----------+------------+-------------------------------------+
49| PINMUX    | on-chip    | pinmux                              |
50+-----------+------------+-------------------------------------+
51| GPIO      | on-chip    | gpio                                |
52+-----------+------------+-------------------------------------+
53| UART      | on-chip    | serial port-polling;                |
54|           |            | serial port-interrupt               |
55+-----------+------------+-------------------------------------+
56| SPI       | on-chip    | spi                                 |
57+-----------+------------+-------------------------------------+
58| DMA       | on-chip    | dma                                 |
59+-----------+------------+-------------------------------------+
60| I2C       | on-chip    | i2c                                 |
61+-----------+------------+-------------------------------------+
62| I3C       | on-chip    | i3c                                 |
63+-----------+------------+-------------------------------------+
64| CLOCK     | on-chip    | clock_control                       |
65+-----------+------------+-------------------------------------+
66| FLASH     | on-chip    | soc flash                           |
67+-----------+------------+-------------------------------------+
68| FLEXSPI   | on-chip    | flash programming                   |
69+-----------+------------+-------------------------------------+
70| DAC       | on-chip    | dac                                 |
71+-----------+------------+-------------------------------------+
72| ENET QOS  | on-chip    | ethernet                            |
73+-----------+------------+-------------------------------------+
74| WATCHDOG  | on-chip    | watchdog                            |
75+-----------+------------+-------------------------------------+
76| PWM       | on-chip    | pwm                                 |
77+-----------+------------+-------------------------------------+
78| SCTimer   | on-chip    | pwm                                 |
79+-----------+------------+-------------------------------------+
80| CTIMER    | on-chip    | counter                             |
81+-----------+------------+-------------------------------------+
82| USDHC     | on-chip    | sdhc                                |
83+-----------+------------+-------------------------------------+
84| VREF      | on-chip    | regulator                           |
85+-----------+------------+-------------------------------------+
86| ADC       | on-chip    | adc                                 |
87+-----------+------------+-------------------------------------+
88| HWINFO    | on-chip    | Unique device serial number         |
89+-----------+------------+-------------------------------------+
90| USBHS     | on-chip    | USB device                          |
91+-----------+------------+-------------------------------------+
92| LPCMP     | on-chip    | sensor(comparator)                  |
93+-----------+------------+-------------------------------------+
94| FLEXCAN   | on-chip    | CAN                                 |
95+-----------+------------+-------------------------------------+
96| LPTMR     | on-chip    | counter                             |
97+-----------+------------+-------------------------------------+
98| FLEXIO    | on-chip    | flexio                              |
99+-----------+------------+-------------------------------------+
100| DISPLAY   | on-chip    | flexio; MIPI-DBI. Tested with       |
101|           |            | :ref:`lcd_par_s035`                 |
102+-----------+------------+-------------------------------------+
103| MRT       | on-chip    | counter                             |
104+-----------+------------+-------------------------------------+
105
106Targets available
107==================
108
109The default configuration file
110:zephyr_file:`boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0_defconfig`
111only enables the first core.
112
113Other hardware features are not currently supported by the port.
114
115Connections and IOs
116===================
117
118The MCX-N947 SoC has 6 gpio controllers and has pinmux registers which
119can be used to configure the functionality of a pin.
120
121+------------+-----------------+----------------------------+
122| Name       | Function        | Usage                      |
123+============+=================+============================+
124| P0_PIO1_8  | UART            | UART RX                    |
125+------------+-----------------+----------------------------+
126| P1_PIO1_9  | UART            | UART TX                    |
127+------------+-----------------+----------------------------+
128
129System Clock
130============
131
132The MCX-N947 SoC is configured to use PLL0 running at 150MHz as a source for
133the system clock.
134
135Serial Port
136===========
137
138The FRDM-MCXN947 SoC has 10 FLEXCOMM interfaces for serial communication.
139Flexcomm 4 is configured as UART for the console.
140
141Programming and Debugging
142*************************
143
144Build and flash applications as usual (see :ref:`build_an_application` and
145:ref:`application_run` for more details).
146
147Configuring a Debug Probe
148=========================
149
150A debug probe is used for both flashing and debugging the board. This board is
151configured by default to use the MCU-Link CMSIS-DAP Onboard Debug Probe.
152
153Using LinkServer
154----------------
155
156Linkserver is the default runner for this board, and supports the factory
157default MCU-Link firmware. Follow the instructions in
158:ref:`mcu-link-cmsis-onboard-debug-probe` to reprogram the default MCU-Link
159firmware. This only needs to be done if the default onboard debug circuit
160firmware was changed. To put the board in ``DFU mode`` to program the firmware,
161short jumper J21.
162
163Using J-Link
164------------
165
166There are two options. The onboard debug circuit can be updated with Segger
167J-Link firmware by following the instructions in
168:ref:`mcu-link-jlink-onboard-debug-probe`.
169To be able to program the firmware, you need to put the board in ``DFU mode``
170by shortening the jumper J21.
171The second option is to attach a :ref:`jlink-external-debug-probe` to the
17210-pin SWD connector (J23) of the board. Additionally, the jumper J19 must
173be shortened.
174For both options use the ``-r jlink`` option with west to use the jlink runner.
175
176.. code-block:: console
177
178   west flash -r jlink
179
180Configuring a Console
181=====================
182
183Connect a USB cable from your PC to J17, and use the serial terminal of your choice
184(minicom, putty, etc.) with the following settings:
185
186- Speed: 115200
187- Data: 8 bits
188- Parity: None
189- Stop bits: 1
190
191Flashing
192========
193
194Here is an example for the :zephyr:code-sample:`hello_world` application.
195
196.. zephyr-app-commands::
197   :zephyr-app: samples/hello_world
198   :board: frdm_mcxn947/mcxn947/cpu0
199   :goals: flash
200
201Open a serial terminal, reset the board (press the RESET button), and you should
202see the following message in the terminal:
203
204.. code-block:: console
205
206   *** Booting Zephyr OS build v3.6.0-479-g91faa20c6741 ***
207   Hello World! frdm_mcxn947/mcxn947/cpu0
208
209Flashing to QSPI
210================
211
212Here is an example for the :zephyr:code-sample:`hello_world` application.
213
214.. zephyr-app-commands::
215   :app: zephyr/samples/hello_world
216   :board: frdm_mcxn947/mcxn947/cpu0/qspi
217   :gen-args: -DCONFIG_MCUBOOT_SIGNATURE_KEY_FILE=\"bootloader/mcuboot/root-rsa-2048.pem\" -DCONFIG_BOOTLOADER_MCUBOOT=y
218   :goals: flash
219
220
221In order to load Zephyr application from QSPI you should program a bootloader like
222MCUboot bootloader to internal flash. Here are the steps.
223
224.. zephyr-app-commands::
225   :app: bootloader/mcuboot/boot/zephyr
226   :board: frdm_mcxn947/mcxn947/cpu0/qspi
227   :goals: flash
228
229Open a serial terminal, reset the board (press the RESET button), and you should
230see the following message in the terminal:
231
232.. code-block:: console
233
234  *** Booting MCUboot v2.1.0-rc1-2-g9f034729d99a ***
235  *** Using Zephyr OS build v3.6.0-4046-gf279a03af8ab ***
236  I: Starting bootloader
237  I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
238  I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
239  I: Boot source: none
240  I: Image index: 0, Swap type: none
241  I: Bootloader chainload address offset: 0x0
242  I: Jumping to the first image slot
243  *** Booting Zephyr OS build v3.6.0-4046-gf279a03af8ab ***
244  Hello World! frdm_mcxn947/mcxn947/cpu0/qspi
245
246Debugging
247=========
248
249Here is an example for the :zephyr:code-sample:`hello_world` application.
250
251.. zephyr-app-commands::
252   :zephyr-app: samples/hello_world
253   :board: frdm_mcxn947/mcxn947/cpu0
254   :goals: debug
255
256Open a serial terminal, step through the application in your debugger, and you
257should see the following message in the terminal:
258
259.. code-block:: console
260
261   *** Booting Zephyr OS build v3.6.0-479-g91faa20c6741 ***
262   Hello World! frdm_mcxn947/mcxn947/cpu0
263
264Troubleshooting
265===============
266
267.. include:: ../../common/segger-ecc-systemview.rst
268   :start-after: segger-ecc-systemview
269
270.. _MCX-N947 SoC Website:
271   https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/mcx-arm-cortex-m/mcx-n-series-microcontrollers/mcx-n94x-54x-highly-integrated-multicore-mcus-with-on-chip-accelerators-intelligent-peripherals-and-advanced-security:MCX-N94X-N54X
272
273.. _MCX-N947 Datasheet:
274   https://www.nxp.com/docs/en/data-sheet/MCXNx4xDS.pdf
275
276.. _MCX-N947 Reference Manual:
277   https://www.nxp.com/webapp/Download?colCode=MCXNX4XRM
278
279.. _FRDM-MCXN947 Website:
280   https://www.nxp.com/design/design-center/development-boards/general-purpose-mcus/frdm-development-board-for-mcx-n94-n54-mcus:FRDM-MCXN947
281
282.. _FRDM-MCXN947 User Guide:
283   https://www.nxp.com/document/guide/getting-started-with-frdm-mcxn947:GS-FRDM-MCXNXX
284
285.. _FRDM-MCXN947 Board User Manual:
286   https://www.nxp.com/webapp/Download?colCode=UM12018
287
288.. _FRDM-MCXN947 Schematics:
289   https://www.nxp.com/webapp/Download?colCode=90818-MCXN947SH
290