| /Zephyr-latest/samples/drivers/led/pwm/boards/ |
| D | mec15xxevb_assy6853.overlay | 25 /* struct pwm_dt_spec: phandle channel period(ns) flags */
|
| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_k2x.dtsi | 348 #io-channel-cells = <1>; 357 #io-channel-cells = <1>; 366 #io-channel-cells = <1>;
|
| /Zephyr-latest/boards/adi/max32672fthr/doc/ |
| D | index.rst | 138 | 5 | P0_11 | GPIO or Analog Input (AIN3 channel). … 140 | 6 | P0_12 | GPIO or Analog Input (AIN4 channel). … 142 | 7 | P0_13 | GPIO or Analog Input (AIN5 channel). …
|
| /Zephyr-latest/drivers/audio/ |
| D | tlv320dac310x.c | 145 audio_channel_t channel, in codec_set_property() argument 149 if (channel != AUDIO_CHANNEL_ALL) { in codec_set_property() 151 channel); in codec_set_property()
|
| /Zephyr-latest/samples/subsys/zbus/msg_subscriber/ |
| D | README.rst | 33 I: ----> Publishing to acc_data_chan channel 55 I: ----> Publishing to acc_data_chan channel
|
| /Zephyr-latest/boards/u-blox/ubx_evkninab4/ |
| D | ubx_evkninab4_nrf52833.dts | 107 #io-channel-cells = <1>; 108 io-channel-map = <0 &adc 2>, /* A0 = P0.04 = AIN2 */
|
| /Zephyr-latest/dts/riscv/espressif/esp32c2/ |
| D | esp32c2_common.dtsi | 224 channel-count = <5>; 225 #io-channel-cells = <1>;
|
| /Zephyr-latest/boards/u-blox/ubx_bmd300eval/ |
| D | ubx_bmd300eval_nrf52832.dts | 109 #io-channel-cells = <1>; 110 io-channel-map = <0 &adc 1>, /* A0 = P0.3 = AIN1 */
|
| /Zephyr-latest/drivers/adc/ |
| D | adc_sam_afec.c | 221 uint8_t channel = 0U; in start_read() local 228 ++channel; in start_read()
|
| /Zephyr-latest/boards/adi/ad_swiot1l_sl/doc/ |
| D | index.rst | 69 - AD74413R Quad-channel, Software Configurable I/O 70 - MAX14906 Quad-channel, Industrial Digital I/O
|
| /Zephyr-latest/drivers/ethernet/ |
| D | eth_nxp_s32_netc.c | 34 static void nxp_s32_eth_msix_wrapper(const struct device *dev, uint32_t channel, in nxp_s32_eth_msix_wrapper() argument 43 msix->handler(channel, NULL, 0); in nxp_s32_eth_msix_wrapper()
|
| /Zephyr-latest/dts/riscv/ite/ |
| D | it81xx2.dtsi | 363 channel-switch-sel = <I2C_CHA_LOCATE>; 380 channel-switch-sel = <I2C_CHB_LOCATE>; 397 channel-switch-sel = <I2C_CHC_LOCATE>; 413 channel-switch-sel = <I2C_CHD_LOCATE>; 428 channel-switch-sel = <I2C_CHE_LOCATE>; 443 channel-switch-sel = <I2C_CHF_LOCATE>;
|
| /Zephyr-latest/subsys/mgmt/osdp/ |
| D | Kconfig.cp | 52 master Key. This is a mandatory key when secure channel is enabled.
|
| /Zephyr-latest/boards/microchip/ev11l78a/ |
| D | ev11l78a.dts | 112 channel@4 {
|
| /Zephyr-latest/drivers/misc/nxp_s32_emios/ |
| D | nxp_s32_emios.c | 64 .hwChannel = DT_PROP(node_id, channel), \
|
| /Zephyr-latest/tests/drivers/dma/scatter_gather/src/ |
| D | test_dma_sg.c | 43 uint32_t channel, int status) in dma_sg_callback() argument
|
| /Zephyr-latest/samples/drivers/espi/ |
| D | README.rst | 44 VW channel is ready
|
| /Zephyr-latest/tests/drivers/build_all/sensor/ |
| D | i2c.dtsi | 710 enable-channel = <1 0 0>; 946 channel = <1>; 952 channel = <2>; 958 channel = <3>; 964 channel = <4>; 970 channel = <5>; 976 channel = <6>; 1243 external-channel;
|
| /Zephyr-latest/dts/arm/adi/max32/ |
| D | max32xxx.dtsi | 214 channel-count = <17>; 215 #io-channel-cells = <1>;
|
| /Zephyr-latest/dts/arm/atmel/ |
| D | sam4s.dtsi | 231 #io-channel-cells = <1>; 241 #io-channel-cells = <1>;
|
| /Zephyr-latest/drivers/serial/ |
| D | Kconfig.nrfx_uart_instance | 30 Feature uses a PPI channel. 64 Hardware RX byte counting requires timer instance and one PPI channel.
|
| /Zephyr-latest/drivers/spi/ |
| D | spi_mcux_ecspi.c | 70 transfer.channel = ctx->config->slave; in spi_mcux_transfer_next_packet() 185 master_config.channel = in spi_mcux_configure()
|
| /Zephyr-latest/drivers/sensor/meas/ms5837/ |
| D | ms5837.c | 142 enum sensor_channel channel) in ms5837_sample_fetch() argument 149 __ASSERT_NO_MSG(channel == SENSOR_CHAN_ALL); in ms5837_sample_fetch()
|
| /Zephyr-latest/boards/panasonic/pan1783/ |
| D | pan1783_nrf5340_cpuapp_common.dtsi | 127 #io-channel-cells = <1>; 128 io-channel-map = <0 &adc 0>, /* A0 = P0.4 = AIN0 */
|
| /Zephyr-latest/dts/arm/renesas/ra/ra6/ |
| D | r7fa6m1ad3cfp.dtsi | 42 channel-available-mask = <0x1700ef>; 46 channel-available-mask = <0x300e7>;
|