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/Zephyr-latest/boards/weact/stm32g431_core/
Dweact_stm32g431_core.dts163 channel@c {
/Zephyr-latest/boards/panasonic/pan1781_evb/
Dpan1781_evb.dts101 channel-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
/Zephyr-latest/samples/basic/blinky_pwm/
DREADME.rst26 The board must have an LED connected to a PWM output channel. The PWM
/Zephyr-latest/samples/drivers/ipm/ipm_esp32/
DREADME.rst18 any application, each channel supports up to 64 bytes of data per
/Zephyr-latest/boards/qemu/cortex_r5/doc/
Dindex.rst49 This board configuration uses a single serial communication channel with the
/Zephyr-latest/boards/qemu/malta/doc/
Dindex.rst51 This board configuration uses a single serial communication channel
/Zephyr-latest/boards/ezurio/bl652_dvk/
Dbl652_dvk.dts108 #io-channel-cells = <1>;
/Zephyr-latest/boards/nordic/nrf51dk/
Dnrf51dk_nrf51822.dts98 channel-gpios = <&gpio0 21 PWM_POLARITY_INVERTED>;
/Zephyr-latest/dts/arm/st/f3/
Dstm32f302.dtsi111 #io-channel-cells = <1>;
/Zephyr-latest/tests/bluetooth/controller/ctrl_isoal/
DKconfig40 ISO-AL per channel. Buffering is required to compute the size of the
/Zephyr-latest/doc/develop/api/
Ddesign_guidelines.rst24 callback invocation, such as a channel identifier, new status value,
63 counter channel timed-out and the counter value at which the timeout
/Zephyr-latest/samples/shields/x_nucleo_iks02a1/microphone/
DREADME.rst72 - 1 channel (mono)
74 One second of acquisition at a 1 channel 16KHz sampling rate yields 16,000 16-bit samples.
/Zephyr-latest/tests/drivers/can/host/
DREADME.rst67 channel = zcan0
108 channel = can0
/Zephyr-latest/dts/arm/st/g4/
Dstm32g4.dtsi112 #io-channel-cells = <1>;
128 #io-channel-cells = <1>;
143 #io-channel-cells = <1>;
151 #io-channel-cells = <1>;
/Zephyr-latest/drivers/serial/
Duart_ns16550.c1562 static void dma_callback(const struct device *dev, void *user_data, uint32_t channel, argument
1570 if (channel == tx_params->dma_channel) {
1572 } else if (channel == rx_params->dma_channel) {
1875 DT_INST_DMAS_CELL_BY_NAME(n, tx, channel), \
1885 .dma_slot = DT_INST_DMAS_CELL_BY_NAME(n, tx, channel), \
1894 DT_INST_DMAS_CELL_BY_NAME(n, rx, channel), \
1904 .dma_slot = DT_INST_DMAS_CELL_BY_NAME(n, rx, channel), \
/Zephyr-latest/dts/arm/nuvoton/npcx/
Dnpcx4.dtsi301 channel-count = <26>;
308 #io-channel-cells = <1>;
313 channel-count = <26>;
/Zephyr-latest/modules/openthread/
DCMakeLists.txt53 kconfig_to_ot_option(CONFIG_OPENTHREAD_CHANNEL_MANAGER OT_CHANNEL_MANAGER "Enable channel manager s…
54 …ion(CONFIG_OPENTHREAD_CHANNEL_MANAGER_CSL OT_CHANNEL_MANAGER_CSL "Channel manager for CSL channel")
55 kconfig_to_ot_option(CONFIG_OPENTHREAD_CHANNEL_MONITOR OT_CHANNEL_MONITOR "Enable channel monitor s…
/Zephyr-latest/tests/lib/devicetree/api/src/
Dmain.c286 zassert_equal(DT_PHA_BY_IDX_OR(TEST_TEMP, dmas, 1, channel, X), 3, ""); in ZTEST()
290 zassert_equal(DT_PHA_OR(TEST_TEMP, dmas, channel, X), 1, ""); in ZTEST()
293 zassert_equal(DT_PHA_BY_NAME_OR(TEST_TEMP, dmas, tx, channel, X), 1, in ZTEST()
311 zassert_equal(DT_INST_PHA_BY_IDX_OR(0, dmas, 1, channel, X), 3, ""); in ZTEST()
315 zassert_equal(DT_INST_PHA_OR(0, dmas, channel, X), 1, ""); in ZTEST()
318 zassert_equal(DT_INST_PHA_BY_NAME_OR(0, dmas, tx, channel, X), 1, in ZTEST()
1306 zassert_equal(DT_DMAS_CELL_BY_NAME(TEST_TEMP, rx, channel), 3, ""); in ZTEST()
1307 zassert_equal(DT_INST_DMAS_CELL_BY_NAME(0, rx, channel), 3, ""); in ZTEST()
1311 zassert_equal(DT_DMAS_CELL_BY_IDX(TEST_TEMP, 1, channel), 3, ""); in ZTEST()
1312 zassert_equal(DT_INST_DMAS_CELL_BY_IDX(0, 1, channel), 3, ""); in ZTEST()
[all …]
/Zephyr-latest/drivers/pwm/
Dpwm_mcux_ctimer.c193 static int mcux_ctimer_pwm_get_cycles_per_sec(const struct device *dev, uint32_t channel, in mcux_ctimer_pwm_get_cycles_per_sec() argument
/Zephyr-latest/boards/st/stm32l496g_disco/
Dstm32l496g_disco.dts197 dmas = <&dma2 7 3 0x480>; /* channel 7 request 3 on DMA2 */
/Zephyr-latest/samples/bluetooth/bap_broadcast_sink/
DKconfig65 USB audio only supports a single audio channel.
/Zephyr-latest/samples/boards/nordic/battery/
DREADME.rst31 present, the ADC configuration (device and channel) needs to be provided via
/Zephyr-latest/boards/qemu/cortex_a53/doc/
Dindex.rst45 This board configuration uses a single serial communication channel with the
/Zephyr-latest/boards/qemu/cortex_m0/doc/
Dindex.rst49 This board configuration uses a single serial communication channel with the
/Zephyr-latest/boards/arm/fvp_base_revc_2xaemv8a/doc/
Dindex.rst52 This board configuration uses a single serial communication channel with the

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