1.. zephyr:board:: qemu_cortex_r5
2
3Overview
4********
5
6This board configuration will use QEMU to emulate the Xilinx Zynq UltraScale+
7(ZynqMP) platform.
8
9This configuration provides support for an ARM Cortex-R5 CPU and these devices:
10
11* ARM PL-390 Generic Interrupt Controller
12* Xilinx Zynq TTC (Cadence TTC)
13* Xilinx Zynq UART
14
15.. note::
16   This board configuration makes no claims about its suitability for use
17   with an actual ZCU102 hardware system, or any other hardware system.
18
19Hardware
20********
21Supported Features
22==================
23
24The following hardware features are supported:
25
26+--------------+------------+----------------------+
27| Interface    | Controller | Driver/Component     |
28+==============+============+======================+
29| GIC          | on-chip    | generic interrupt    |
30|              |            | controller           |
31+--------------+------------+----------------------+
32| TTC          | on-chip    | system timer         |
33+--------------+------------+----------------------+
34| UART         | on-chip    | serial port          |
35+--------------+------------+----------------------+
36
37The kernel currently does not support other hardware features on this platform.
38
39Devices
40========
41System Timer
42------------
43
44This board configuration uses a system timer tick frequency of 1000 Hz.
45
46Serial Port
47-----------
48
49This board configuration uses a single serial communication channel with the
50on-chip UART0.
51
52Known Problems or Limitations
53==============================
54
55The following platform features are unsupported:
56
57* Dual-redundant Core Lock-step (DCLS) execution is not emulated.
58* Xilinx Zynq TTC driver does not support tickless mode operation.
59
60Programming and Debugging
61*************************
62
63Use this configuration to run basic Zephyr applications and kernel tests in the
64QEMU emulated environment, for example, with the :zephyr:code-sample:`synchronization` sample:
65
66.. zephyr-app-commands::
67   :zephyr-app: samples/synchronization
68   :host-os: unix
69   :board: qemu_cortex_r5
70   :goals: run
71
72This will build an image with the synchronization sample app, boot it using
73QEMU, and display the following console output:
74
75.. code-block:: console
76
77        *** Booting Zephyr OS build v2.2.0  ***
78        threadA: Hello World from qemu_cortex_r5!
79        threadB: Hello World from qemu_cortex_r5!
80        threadA: Hello World from qemu_cortex_r5!
81        threadB: Hello World from qemu_cortex_r5!
82        threadA: Hello World from qemu_cortex_r5!
83        threadB: Hello World from qemu_cortex_r5!
84        threadA: Hello World from qemu_cortex_r5!
85        threadB: Hello World from qemu_cortex_r5!
86        threadA: Hello World from qemu_cortex_r5!
87        threadB: Hello World from qemu_cortex_r5!
88
89Exit QEMU by pressing :kbd:`CTRL+A` :kbd:`x`.
90
91Debugging
92=========
93
94Refer to the detailed overview about :ref:`application_debugging`.
95
96References
97**********
98
99.. target-notes::
100
1011. ARMv7-A and ARMv7-R Architecture Reference Manual (ARM DDI 0406C ID051414)
1022. Cortex-R5 and Cortex-R5F Technical Reference Manual (ARM DDI 0460C ID021511)
1033. Zynq UltraScale+ Device Technical Reference Manual (UG1085)
104