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Searched refs:iChannel (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_tim.h1353 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
1354 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
1355 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1356 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1357 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1386 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
1387 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
1388 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
1415 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_GetMode() local
1416 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_GetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_tim.h1343 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
1344 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
1345 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1346 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1347 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1376 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
1377 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
1378 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
1405 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_GetMode() local
1406 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_GetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_tim.h1658 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
1659 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
1660 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1661 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1662 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1663 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1664 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1693 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
1694 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
1695 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_tim.h1679 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
1680 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
1681 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1682 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1683 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1684 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1685 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1714 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
1715 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
1716 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_tim.h1631 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
1632 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
1633 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1634 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1635 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1636 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1637 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1666 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
1667 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
1668 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_tim.h1701 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
1702 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
1703 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1704 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1705 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1706 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1707 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1736 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
1737 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
1738 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_tim.h1900 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
1901 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
1902 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1903 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1904 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1905 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1906 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1945 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
1946 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
1947 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_tim.h2101 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2102 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2103 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2104 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2105 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2106 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2107 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2146 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2147 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2148 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_tim.h2103 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2104 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2105 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2106 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2107 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2108 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2109 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2148 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2149 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2150 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_tim.h1953 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
1954 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
1955 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1956 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1957 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1958 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
1959 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
1998 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
1999 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2000 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_tim.h2028 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2029 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2030 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2031 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2032 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2033 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2034 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2073 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2074 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2075 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_tim.h2047 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2048 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2049 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2050 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2051 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2052 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2053 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2092 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2093 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2094 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_tim.h2076 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2077 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2078 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2079 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2080 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2081 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2082 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2137 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2138 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2139 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_tim.h2226 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2227 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2228 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2229 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2230 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2231 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2232 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2271 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2272 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2273 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_tim.h2127 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2128 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2129 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2130 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2131 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2132 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2133 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2172 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2173 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2174 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_tim.h2163 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2164 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2165 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2166 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2167 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2168 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2169 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2208 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2209 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2210 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_tim.h2037 register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2038 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2039 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2040 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2041 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2042 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2043 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2082 register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2083 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2084 …((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_tim.h2100 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2101 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2102 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2103 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2104 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2105 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2106 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2145 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2146 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2147 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_tim.h2437 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2438 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2439 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2440 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2441 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2442 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2443 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2484 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2485 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2486 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
Dstm32n6xx_ll_adc.h4985 const uint32_t iChannel = __ADC_CHANNEL_INDEX(Channel); in LL_ADC_SetChannelSamplingTime() local
4987 ((ADC_CHANNEL_LUT[iChannel] in LL_ADC_SetChannelSamplingTime()
4990 ADC_SMPR1_SMP0 << ((ADC_CHANNEL_LUT[iChannel] & ADC_CHANNEL_SMPx_BITOFFSET_MASK) in LL_ADC_SetChannelSamplingTime()
4992 SamplingTime << ((ADC_CHANNEL_LUT[iChannel] & ADC_CHANNEL_SMPx_BITOFFSET_MASK) in LL_ADC_SetChannelSamplingTime()
5069 const uint32_t iChannel = __ADC_CHANNEL_INDEX(Channel); in LL_ADC_GetChannelSamplingTime() local
5071 ((ADC_CHANNEL_LUT[iChannel] in LL_ADC_GetChannelSamplingTime()
5075 << ((ADC_CHANNEL_LUT[iChannel] in LL_ADC_GetChannelSamplingTime()
5077 >> ((ADC_CHANNEL_LUT[iChannel] & ADC_CHANNEL_SMPx_BITOFFSET_MASK) in LL_ADC_GetChannelSamplingTime()
5142 const uint32_t iChannel = __ADC_CHANNEL_INDEX(Channel); in LL_ADC_SetChannelSingleDiff() local
5144 ADC_CHANNEL_LUT[iChannel] & ADC_SINGLEDIFF_CHANNEL_MASK, in LL_ADC_SetChannelSingleDiff()
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_tim.h2353 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2354 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2355 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2356 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2357 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2358 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2359 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2400 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2401 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2402 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_tim.h2340 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2341 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2342 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2343 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2344 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2345 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2346 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2387 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2388 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2389 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_tim.h2649 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2650 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2651 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2652 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2653 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2654 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2655 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2696 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2697 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2698 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_tim.h2580 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2581 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2582 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2583 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2584 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2585 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2586 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2627 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2628 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2629 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_tim.h2713 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_ConfigOutput() local
2714 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_ConfigOutput()
2715 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2716 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2717 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2718 MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), in LL_TIM_OC_ConfigOutput()
2719 (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); in LL_TIM_OC_ConfigOutput()
2760 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); in LL_TIM_OC_SetMode() local
2761 …t32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); in LL_TIM_OC_SetMode()
2762 … ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel… in LL_TIM_OC_SetMode()
[all …]