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Searched refs:TSC_IOSCR_G3_IO2_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5698 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
5699 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f051x8.h5729 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
5730 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f071xb.h6282 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6283 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f042x6.h9504 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
9505 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f048xx.h9468 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
9469 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f072xb.h10079 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
10080 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f091xc.h10736 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
10737 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f098xx.h10703 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
10704 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f078xx.h10049 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
10050 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6255 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6256 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l062xx.h6392 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6393 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l053xx.h6414 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6415 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l072xx.h6551 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6552 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l073xx.h6710 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6711 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l083xx.h6847 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6848 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l063xx.h6549 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6550 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l082xx.h6688 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
6689 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7516 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
7517 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f318xx.h7503 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
7504 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9369 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
9370 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8726 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
8727 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32u083xx.h9663 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
9664 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8157 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
8158 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h7985 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
7986 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32wb15xx.h8157 #define TSC_IOSCR_G3_IO2_Pos (9U) macro
8158 #define TSC_IOSCR_G3_IO2_Msk (0x1UL << TSC_IOSCR_G3_IO2_Pos) /*!< 0x00000200 */

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