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Searched refs:TSC_IOSCR_G2_IO4_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5692 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
5693 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f051x8.h5723 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
5724 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f071xb.h6276 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6277 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f042x6.h9498 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
9499 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f048xx.h9462 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
9463 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f072xb.h10073 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
10074 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f091xc.h10730 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
10731 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f098xx.h10697 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
10698 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f078xx.h10043 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
10044 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6249 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6250 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l062xx.h6386 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6387 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l053xx.h6408 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6409 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l072xx.h6545 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6546 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l073xx.h6704 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6705 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l083xx.h6841 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6842 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l063xx.h6543 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6544 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l082xx.h6682 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
6683 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7510 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
7511 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f318xx.h7497 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
7498 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9363 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
9364 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8720 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
8721 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32u083xx.h9657 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
9658 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8151 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
8152 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h7979 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
7980 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32wb15xx.h8151 #define TSC_IOSCR_G2_IO4_Pos (7U) macro
8152 #define TSC_IOSCR_G2_IO4_Msk (0x1UL << TSC_IOSCR_G2_IO4_Pos) /*!< 0x00000080 */

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