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Searched refs:TSC_IOSCR_G2_IO3_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5689 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
5690 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f051x8.h5720 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
5721 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f071xb.h6273 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6274 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f042x6.h9495 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
9496 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f048xx.h9459 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
9460 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f072xb.h10070 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
10071 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f091xc.h10727 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
10728 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f098xx.h10694 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
10695 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f078xx.h10040 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
10041 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6246 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6247 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l062xx.h6383 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6384 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l053xx.h6405 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6406 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l072xx.h6542 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6543 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l073xx.h6701 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6702 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l083xx.h6838 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6839 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l063xx.h6540 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6541 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l082xx.h6679 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
6680 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7507 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
7508 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f318xx.h7494 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
7495 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9360 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
9361 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8717 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
8718 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32u083xx.h9654 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
9655 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8148 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
8149 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h7976 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
7977 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32wb15xx.h8148 #define TSC_IOSCR_G2_IO3_Pos (6U) macro
8149 #define TSC_IOSCR_G2_IO3_Msk (0x1UL << TSC_IOSCR_G2_IO3_Pos) /*!< 0x00000040 */

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