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Searched refs:TSC_IOSCR_G2_IO2_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5686 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
5687 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f051x8.h5717 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
5718 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f071xb.h6270 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6271 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f042x6.h9492 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
9493 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f048xx.h9456 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
9457 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f072xb.h10067 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
10068 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f091xc.h10724 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
10725 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f098xx.h10691 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
10692 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f078xx.h10037 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
10038 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6243 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6244 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l062xx.h6380 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6381 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l053xx.h6402 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6403 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l072xx.h6539 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6540 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l073xx.h6698 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6699 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l083xx.h6835 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6836 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l063xx.h6537 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6538 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l082xx.h6676 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
6677 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7504 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
7505 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f318xx.h7491 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
7492 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9357 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
9358 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8714 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
8715 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32u083xx.h9651 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
9652 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8145 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
8146 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h7973 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
7974 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32wb15xx.h8145 #define TSC_IOSCR_G2_IO2_Pos (5U) macro
8146 #define TSC_IOSCR_G2_IO2_Msk (0x1UL << TSC_IOSCR_G2_IO2_Pos) /*!< 0x00000020 */

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