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Searched refs:TSC_IOSCR_G1_IO4_Pos (Results 1 – 25 of 81) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5680 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
5681 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f051x8.h5711 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
5712 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f071xb.h6264 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6265 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f042x6.h9486 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
9487 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f048xx.h9450 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
9451 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f072xb.h10061 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
10062 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f091xc.h10718 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
10719 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f098xx.h10685 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
10686 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f078xx.h10031 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
10032 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6237 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6238 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l062xx.h6374 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6375 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l053xx.h6396 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6397 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l072xx.h6533 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6534 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l073xx.h6692 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6693 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l083xx.h6829 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6830 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l063xx.h6531 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6532 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l082xx.h6670 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
6671 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7498 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
7499 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f318xx.h7485 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
7486 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9351 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
9352 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8708 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
8709 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32u083xx.h9645 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
9646 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8139 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
8140 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h7967 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
7968 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32wb15xx.h8139 #define TSC_IOSCR_G1_IO4_Pos (3U) macro
8140 #define TSC_IOSCR_G1_IO4_Msk (0x1UL << TSC_IOSCR_G1_IO4_Pos) /*!< 0x00000008 */

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