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Searched refs:TSC_IOSCR_G1_IO3_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5677 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
5678 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f051x8.h5708 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
5709 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f071xb.h6261 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6262 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f042x6.h9483 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
9484 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f048xx.h9447 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
9448 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f072xb.h10058 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
10059 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f091xc.h10715 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
10716 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f098xx.h10682 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
10683 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f078xx.h10028 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
10029 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6234 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6235 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l062xx.h6371 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6372 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l053xx.h6393 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6394 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l072xx.h6530 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6531 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l073xx.h6689 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6690 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l083xx.h6826 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6827 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l063xx.h6528 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6529 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l082xx.h6667 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
6668 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7495 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
7496 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f318xx.h7482 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
7483 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9348 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
9349 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8705 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
8706 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32u083xx.h9642 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
9643 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8136 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
8137 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h7964 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
7965 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32wb15xx.h8136 #define TSC_IOSCR_G1_IO3_Pos (2U) macro
8137 #define TSC_IOSCR_G1_IO3_Msk (0x1UL << TSC_IOSCR_G1_IO3_Pos) /*!< 0x00000004 */

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