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Searched refs:TSC_IOSCR_G1_IO2_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5674 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
5675 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f051x8.h5705 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
5706 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f071xb.h6258 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6259 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f042x6.h9480 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
9481 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f048xx.h9444 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
9445 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f072xb.h10055 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
10056 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f091xc.h10712 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
10713 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f098xx.h10679 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
10680 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f078xx.h10025 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
10026 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6231 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6232 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l062xx.h6368 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6369 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l053xx.h6390 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6391 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l072xx.h6527 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6528 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l073xx.h6686 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6687 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l083xx.h6823 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6824 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l063xx.h6525 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6526 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l082xx.h6664 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
6665 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7492 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
7493 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f318xx.h7479 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
7480 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9345 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
9346 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8702 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
8703 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32u083xx.h9639 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
9640 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8133 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
8134 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h7961 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
7962 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32wb15xx.h8133 #define TSC_IOSCR_G1_IO2_Pos (1U) macro
8134 #define TSC_IOSCR_G1_IO2_Msk (0x1UL << TSC_IOSCR_G1_IO2_Pos) /*!< 0x00000002 */

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