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Searched refs:TSC_IOCCR_G6_IO1_Pos (Results 1 – 25 of 81) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5829 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
5830 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f051x8.h5860 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
5861 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f071xb.h6413 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6414 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f042x6.h9635 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
9636 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f048xx.h9599 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
9600 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f072xb.h10210 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
10211 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f091xc.h10867 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
10868 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f098xx.h10834 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
10835 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f078xx.h10180 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
10181 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6386 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6387 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32l062xx.h6523 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6524 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32l053xx.h6545 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6546 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32l072xx.h6682 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6683 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32l073xx.h6841 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6842 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32l083xx.h6978 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6979 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32l063xx.h6680 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6681 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32l082xx.h6819 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
6820 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7647 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
7648 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32f318xx.h7634 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
7635 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9470 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
9471 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8845 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
8846 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32u083xx.h9782 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
9783 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8276 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
8277 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8104 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
8105 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */
Dstm32wb15xx.h8276 #define TSC_IOCCR_G6_IO1_Pos (20U) macro
8277 #define TSC_IOCCR_G6_IO1_Msk (0x1UL << TSC_IOCCR_G6_IO1_Pos) /*!< 0x00100000 */

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