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Searched refs:TSC_IOCCR_G4_IO4_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5814 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
5815 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f051x8.h5845 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
5846 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f071xb.h6398 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6399 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f042x6.h9620 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
9621 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f048xx.h9584 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
9585 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f072xb.h10195 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
10196 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f091xc.h10852 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
10853 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f098xx.h10819 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
10820 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f078xx.h10165 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
10166 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6371 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6372 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32l062xx.h6508 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6509 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32l053xx.h6530 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6531 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32l072xx.h6667 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6668 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32l073xx.h6826 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6827 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32l083xx.h6963 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6964 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32l063xx.h6665 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6666 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32l082xx.h6804 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
6805 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7632 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
7633 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32f318xx.h7619 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
7620 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9455 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
9456 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8830 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
8831 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32u083xx.h9767 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
9768 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8261 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
8262 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8089 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
8090 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */
Dstm32wb15xx.h8261 #define TSC_IOCCR_G4_IO4_Pos (15U) macro
8262 #define TSC_IOCCR_G4_IO4_Msk (0x1UL << TSC_IOCCR_G4_IO4_Pos) /*!< 0x00008000 */

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