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Searched refs:TSC_IOCCR_G4_IO2_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5808 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
5809 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f051x8.h5839 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
5840 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f071xb.h6392 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6393 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f042x6.h9614 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
9615 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f048xx.h9578 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
9579 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f072xb.h10189 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
10190 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f091xc.h10846 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
10847 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f098xx.h10813 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
10814 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f078xx.h10159 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
10160 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6365 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6366 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32l062xx.h6502 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6503 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32l053xx.h6524 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6525 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32l072xx.h6661 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6662 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32l073xx.h6820 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6821 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32l083xx.h6957 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6958 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32l063xx.h6659 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6660 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32l082xx.h6798 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
6799 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7626 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
7627 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32f318xx.h7613 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
7614 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9449 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
9450 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8824 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
8825 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32u083xx.h9761 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
9762 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8255 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
8256 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8083 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
8084 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */
Dstm32wb15xx.h8255 #define TSC_IOCCR_G4_IO2_Pos (13U) macro
8256 #define TSC_IOCCR_G4_IO2_Msk (0x1UL << TSC_IOCCR_G4_IO2_Pos) /*!< 0x00002000 */

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