Home
last modified time | relevance | path

Searched refs:TSC_IOCCR_G4_IO1_Pos (Results 1 – 25 of 83) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5805 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
5806 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f051x8.h5836 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
5837 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f071xb.h6389 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6390 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f042x6.h9611 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
9612 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f048xx.h9575 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
9576 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f072xb.h10186 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
10187 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f091xc.h10843 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
10844 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f098xx.h10810 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
10811 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f078xx.h10156 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
10157 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6362 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6363 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32l062xx.h6499 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6500 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32l053xx.h6521 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6522 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32l072xx.h6658 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6659 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32l073xx.h6817 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6818 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32l083xx.h6954 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6955 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32l063xx.h6656 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6657 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32l082xx.h6795 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
6796 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7623 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
7624 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32f318xx.h7610 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
7611 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9446 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
9447 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8821 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
8822 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32u083xx.h9758 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
9759 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8252 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
8253 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8080 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
8081 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */
Dstm32wb15xx.h8252 #define TSC_IOCCR_G4_IO1_Pos (12U) macro
8253 #define TSC_IOCCR_G4_IO1_Msk (0x1UL << TSC_IOCCR_G4_IO1_Pos) /*!< 0x00001000 */

1234