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Searched refs:TSC_IOCCR_G3_IO4_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5802 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
5803 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f051x8.h5833 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
5834 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f071xb.h6386 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6387 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f042x6.h9608 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
9609 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f048xx.h9572 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
9573 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f072xb.h10183 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
10184 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f091xc.h10840 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
10841 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f098xx.h10807 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
10808 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f078xx.h10153 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
10154 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6359 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6360 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32l062xx.h6496 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6497 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32l053xx.h6518 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6519 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32l072xx.h6655 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6656 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32l073xx.h6814 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6815 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32l083xx.h6951 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6952 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32l063xx.h6653 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6654 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32l082xx.h6792 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
6793 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7620 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
7621 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32f318xx.h7607 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
7608 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9443 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
9444 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8818 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
8819 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32u083xx.h9755 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
9756 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8249 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
8250 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8077 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
8078 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */
Dstm32wb15xx.h8249 #define TSC_IOCCR_G3_IO4_Pos (11U) macro
8250 #define TSC_IOCCR_G3_IO4_Msk (0x1UL << TSC_IOCCR_G3_IO4_Pos) /*!< 0x00000800 */

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