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Searched refs:TSC_IOCCR_G3_IO2_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5796 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
5797 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f051x8.h5827 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
5828 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f071xb.h6380 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6381 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f042x6.h9602 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
9603 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f048xx.h9566 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
9567 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f072xb.h10177 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
10178 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f091xc.h10834 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
10835 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f098xx.h10801 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
10802 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f078xx.h10147 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
10148 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6353 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6354 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l062xx.h6490 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6491 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l053xx.h6512 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6513 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l072xx.h6649 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6650 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l073xx.h6808 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6809 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l083xx.h6945 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6946 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l063xx.h6647 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6648 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32l082xx.h6786 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
6787 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7614 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
7615 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32f318xx.h7601 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
7602 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9437 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
9438 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8812 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
8813 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32u083xx.h9749 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
9750 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8243 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
8244 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8071 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
8072 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */
Dstm32wb15xx.h8243 #define TSC_IOCCR_G3_IO2_Pos (9U) macro
8244 #define TSC_IOCCR_G3_IO2_Msk (0x1UL << TSC_IOCCR_G3_IO2_Pos) /*!< 0x00000200 */

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