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Searched refs:TSC_IOCCR_G2_IO4_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5790 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
5791 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f051x8.h5821 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
5822 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f071xb.h6374 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6375 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f042x6.h9596 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
9597 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f048xx.h9560 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
9561 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f072xb.h10171 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
10172 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f091xc.h10828 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
10829 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f098xx.h10795 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
10796 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f078xx.h10141 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
10142 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6347 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6348 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l062xx.h6484 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6485 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l053xx.h6506 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6507 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l072xx.h6643 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6644 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l073xx.h6802 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6803 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l083xx.h6939 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6940 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l063xx.h6641 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6642 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32l082xx.h6780 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
6781 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7608 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
7609 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32f318xx.h7595 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
7596 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9431 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
9432 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8806 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
8807 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32u083xx.h9743 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
9744 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8237 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
8238 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8065 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
8066 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */
Dstm32wb15xx.h8237 #define TSC_IOCCR_G2_IO4_Pos (7U) macro
8238 #define TSC_IOCCR_G2_IO4_Msk (0x1UL << TSC_IOCCR_G2_IO4_Pos) /*!< 0x00000080 */

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