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Searched refs:TSC_IOCCR_G2_IO3_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5787 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
5788 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f051x8.h5818 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
5819 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f071xb.h6371 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6372 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f042x6.h9593 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
9594 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f048xx.h9557 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
9558 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f072xb.h10168 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
10169 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f091xc.h10825 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
10826 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f098xx.h10792 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
10793 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f078xx.h10138 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
10139 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6344 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6345 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l062xx.h6481 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6482 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l053xx.h6503 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6504 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l072xx.h6640 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6641 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l073xx.h6799 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6800 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l083xx.h6936 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6937 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l063xx.h6638 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6639 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32l082xx.h6777 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
6778 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7605 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
7606 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32f318xx.h7592 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
7593 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9428 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
9429 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8803 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
8804 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32u083xx.h9740 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
9741 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8234 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
8235 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8062 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
8063 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */
Dstm32wb15xx.h8234 #define TSC_IOCCR_G2_IO3_Pos (6U) macro
8235 #define TSC_IOCCR_G2_IO3_Msk (0x1UL << TSC_IOCCR_G2_IO3_Pos) /*!< 0x00000040 */

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