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Searched refs:TSC_IOCCR_G2_IO2_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5784 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
5785 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f051x8.h5815 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
5816 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f071xb.h6368 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6369 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f042x6.h9590 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
9591 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f048xx.h9554 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
9555 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f072xb.h10165 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
10166 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f091xc.h10822 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
10823 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f098xx.h10789 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
10790 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f078xx.h10135 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
10136 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6341 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6342 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l062xx.h6478 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6479 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l053xx.h6500 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6501 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l072xx.h6637 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6638 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l073xx.h6796 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6797 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l083xx.h6933 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6934 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l063xx.h6635 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6636 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32l082xx.h6774 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
6775 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7602 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
7603 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32f318xx.h7589 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
7590 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9425 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
9426 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8800 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
8801 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32u083xx.h9737 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
9738 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8231 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
8232 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8059 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
8060 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */
Dstm32wb15xx.h8231 #define TSC_IOCCR_G2_IO2_Pos (5U) macro
8232 #define TSC_IOCCR_G2_IO2_Msk (0x1UL << TSC_IOCCR_G2_IO2_Pos) /*!< 0x00000020 */

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