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Searched refs:TSC_IOCCR_G1_IO4_Pos (Results 1 – 25 of 81) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5778 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
5779 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f051x8.h5809 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
5810 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f071xb.h6362 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6363 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f042x6.h9584 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
9585 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f048xx.h9548 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
9549 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f072xb.h10159 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
10160 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f091xc.h10816 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
10817 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f098xx.h10783 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
10784 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f078xx.h10129 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
10130 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6335 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6336 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l062xx.h6472 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6473 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l053xx.h6494 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6495 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l072xx.h6631 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6632 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l073xx.h6790 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6791 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l083xx.h6927 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6928 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l063xx.h6629 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6630 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32l082xx.h6768 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
6769 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7596 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
7597 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32f318xx.h7583 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
7584 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9419 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
9420 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8794 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
8795 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32u083xx.h9731 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
9732 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8225 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
8226 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8053 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
8054 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */
Dstm32wb15xx.h8225 #define TSC_IOCCR_G1_IO4_Pos (3U) macro
8226 #define TSC_IOCCR_G1_IO4_Msk (0x1UL << TSC_IOCCR_G1_IO4_Pos) /*!< 0x00000008 */

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