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Searched refs:TSC_IOCCR_G1_IO3_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5775 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
5776 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f051x8.h5806 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
5807 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f071xb.h6359 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6360 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f042x6.h9581 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
9582 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f048xx.h9545 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
9546 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f072xb.h10156 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
10157 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f091xc.h10813 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
10814 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f098xx.h10780 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
10781 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f078xx.h10126 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
10127 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6332 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6333 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l062xx.h6469 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6470 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l053xx.h6491 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6492 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l072xx.h6628 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6629 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l073xx.h6787 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6788 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l083xx.h6924 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6925 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l063xx.h6626 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6627 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32l082xx.h6765 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
6766 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7593 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
7594 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32f318xx.h7580 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
7581 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9416 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
9417 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8791 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
8792 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32u083xx.h9728 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
9729 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8222 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
8223 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8050 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
8051 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */
Dstm32wb15xx.h8222 #define TSC_IOCCR_G1_IO3_Pos (2U) macro
8223 #define TSC_IOCCR_G1_IO3_Msk (0x1UL << TSC_IOCCR_G1_IO3_Pos) /*!< 0x00000004 */

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