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Searched refs:TSC_IOCCR_G1_IO2_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5772 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
5773 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f051x8.h5803 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
5804 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f071xb.h6356 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6357 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f042x6.h9578 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
9579 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f048xx.h9542 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
9543 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f072xb.h10153 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
10154 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f091xc.h10810 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
10811 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f098xx.h10777 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
10778 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f078xx.h10123 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
10124 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6329 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6330 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l062xx.h6466 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6467 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l053xx.h6488 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6489 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l072xx.h6625 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6626 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l073xx.h6784 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6785 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l083xx.h6921 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6922 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l063xx.h6623 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6624 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32l082xx.h6762 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
6763 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7590 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
7591 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32f318xx.h7577 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
7578 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9413 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
9414 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8788 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
8789 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32u083xx.h9725 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
9726 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8219 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
8220 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8047 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
8048 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */
Dstm32wb15xx.h8219 #define TSC_IOCCR_G1_IO2_Pos (1U) macro
8220 #define TSC_IOCCR_G1_IO2_Msk (0x1UL << TSC_IOCCR_G1_IO2_Pos) /*!< 0x00000002 */

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