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Searched refs:TSC_IOCCR_G1_IO1_Pos (Results 1 – 25 of 83) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5769 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
5770 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f051x8.h5800 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
5801 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f071xb.h6353 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6354 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f042x6.h9575 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
9576 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f048xx.h9539 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
9540 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f072xb.h10150 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
10151 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f091xc.h10807 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
10808 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f098xx.h10774 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
10775 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f078xx.h10120 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
10121 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6326 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6327 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32l062xx.h6463 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6464 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32l053xx.h6485 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6486 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32l072xx.h6622 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6623 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32l073xx.h6781 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6782 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32l083xx.h6918 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6919 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32l063xx.h6620 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6621 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32l082xx.h6759 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
6760 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7587 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
7588 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32f318xx.h7574 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
7575 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9410 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
9411 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8785 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
8786 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32u083xx.h9722 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
9723 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8216 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
8217 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8044 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
8045 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */
Dstm32wb15xx.h8216 #define TSC_IOCCR_G1_IO1_Pos (0U) macro
8217 #define TSC_IOCCR_G1_IO1_Msk (0x1UL << TSC_IOCCR_G1_IO1_Pos) /*!< 0x00000001 */

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