/hal_stm32-latest/stm32cube/stm32f0xx/soc/ |
D | stm32f058xx.h | 5615 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 5616 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f051x8.h | 5646 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 5647 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f071xb.h | 6199 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6200 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f042x6.h | 9421 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 9422 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f048xx.h | 9385 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 9386 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f072xb.h | 9996 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 9997 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f091xc.h | 10653 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 10654 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f098xx.h | 10620 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 10621 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f078xx.h | 9966 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 9967 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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/hal_stm32-latest/stm32cube/stm32l0xx/soc/ |
D | stm32l052xx.h | 6172 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6173 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32l062xx.h | 6309 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6310 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32l053xx.h | 6331 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6332 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32l072xx.h | 6468 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6469 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32l073xx.h | 6627 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6628 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32l083xx.h | 6764 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6765 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32l063xx.h | 6466 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6467 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32l082xx.h | 6605 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 6606 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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/hal_stm32-latest/stm32cube/stm32f3xx/soc/ |
D | stm32f301x8.h | 7433 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 7434 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32f318xx.h | 7420 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 7421 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 9316 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 9317 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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/hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
D | stm32u031xx.h | 8655 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 8656 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32u083xx.h | 9592 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 9593 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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/hal_stm32-latest/stm32cube/stm32wbxx/soc/ |
D | stm32wb1mxx.h | 8086 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 8087 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb10xx.h | 7914 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 7915 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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D | stm32wb15xx.h | 8086 #define TSC_IOASCR_G4_IO3_Pos (14U) macro 8087 #define TSC_IOASCR_G4_IO3_Msk (0x1UL << TSC_IOASCR_G4_IO3_Pos) /*!< 0x00004000 */
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