/hal_stm32-latest/stm32cube/stm32f0xx/soc/ |
D | stm32f058xx.h | 5612 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 5613 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f051x8.h | 5643 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 5644 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f071xb.h | 6196 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6197 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f042x6.h | 9418 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 9419 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f048xx.h | 9382 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 9383 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f072xb.h | 9993 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 9994 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f091xc.h | 10650 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 10651 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f098xx.h | 10617 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 10618 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f078xx.h | 9963 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 9964 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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/hal_stm32-latest/stm32cube/stm32l0xx/soc/ |
D | stm32l052xx.h | 6169 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6170 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32l062xx.h | 6306 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6307 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32l053xx.h | 6328 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6329 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32l072xx.h | 6465 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6466 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32l073xx.h | 6624 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6625 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32l083xx.h | 6761 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6762 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32l063xx.h | 6463 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6464 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32l082xx.h | 6602 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 6603 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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/hal_stm32-latest/stm32cube/stm32f3xx/soc/ |
D | stm32f301x8.h | 7430 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 7431 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32f318xx.h | 7417 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 7418 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 9313 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 9314 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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/hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
D | stm32u031xx.h | 8652 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 8653 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32u083xx.h | 9589 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 9590 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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/hal_stm32-latest/stm32cube/stm32wbxx/soc/ |
D | stm32wb1mxx.h | 8083 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 8084 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb10xx.h | 7911 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 7912 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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D | stm32wb15xx.h | 8083 #define TSC_IOASCR_G4_IO2_Pos (13U) macro 8084 #define TSC_IOASCR_G4_IO2_Msk (0x1UL << TSC_IOASCR_G4_IO2_Pos) /*!< 0x00002000 */
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