/hal_stm32-latest/stm32cube/stm32f0xx/soc/ |
D | stm32f058xx.h | 5588 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 5589 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f051x8.h | 5619 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 5620 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f071xb.h | 6172 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6173 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f042x6.h | 9394 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 9395 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f048xx.h | 9358 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 9359 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f072xb.h | 9969 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 9970 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f091xc.h | 10626 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 10627 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f098xx.h | 10593 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 10594 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f078xx.h | 9939 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 9940 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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/hal_stm32-latest/stm32cube/stm32l0xx/soc/ |
D | stm32l052xx.h | 6145 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6146 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32l062xx.h | 6282 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6283 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32l053xx.h | 6304 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6305 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32l072xx.h | 6441 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6442 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32l073xx.h | 6600 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6601 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32l083xx.h | 6737 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6738 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32l063xx.h | 6439 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6440 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32l082xx.h | 6578 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 6579 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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/hal_stm32-latest/stm32cube/stm32f3xx/soc/ |
D | stm32f301x8.h | 7406 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 7407 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32f318xx.h | 7393 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 7394 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 9289 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 9290 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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/hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
D | stm32u031xx.h | 8628 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 8629 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32u083xx.h | 9565 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 9566 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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/hal_stm32-latest/stm32cube/stm32wbxx/soc/ |
D | stm32wb1mxx.h | 8059 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 8060 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb10xx.h | 7887 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 7888 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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D | stm32wb15xx.h | 8059 #define TSC_IOASCR_G2_IO2_Pos (5U) macro 8060 #define TSC_IOASCR_G2_IO2_Msk (0x1UL << TSC_IOASCR_G2_IO2_Pos) /*!< 0x00000020 */
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