/hal_stm32-latest/stm32cube/stm32f0xx/soc/ |
D | stm32f058xx.h | 5582 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 5583 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f051x8.h | 5613 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 5614 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f071xb.h | 6166 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6167 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f042x6.h | 9388 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 9389 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f048xx.h | 9352 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 9353 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f072xb.h | 9963 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 9964 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f091xc.h | 10620 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 10621 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f098xx.h | 10587 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 10588 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f078xx.h | 9933 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 9934 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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/hal_stm32-latest/stm32cube/stm32l0xx/soc/ |
D | stm32l052xx.h | 6139 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6140 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32l062xx.h | 6276 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6277 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32l053xx.h | 6298 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6299 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32l072xx.h | 6435 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6436 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32l073xx.h | 6594 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6595 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32l083xx.h | 6731 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6732 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32l063xx.h | 6433 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6434 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32l082xx.h | 6572 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 6573 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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/hal_stm32-latest/stm32cube/stm32f3xx/soc/ |
D | stm32f301x8.h | 7400 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 7401 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32f318xx.h | 7387 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 7388 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 9283 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 9284 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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/hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
D | stm32u031xx.h | 8622 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 8623 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32u083xx.h | 9559 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 9560 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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/hal_stm32-latest/stm32cube/stm32wbxx/soc/ |
D | stm32wb1mxx.h | 8053 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 8054 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb10xx.h | 7881 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 7882 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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D | stm32wb15xx.h | 8053 #define TSC_IOASCR_G1_IO4_Pos (3U) macro 8054 #define TSC_IOASCR_G1_IO4_Msk (0x1UL << TSC_IOASCR_G1_IO4_Pos) /*!< 0x00000008 */
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