/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/ |
D | stm32l0xx_ll_tim.h | 336 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 2801 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 2812 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 2823 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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D | stm32l0xx_hal_tim.h | 571 #define TIM_IT_UPDATE TIM_DIER_UIE /*!< Update interru…
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/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/ |
D | stm32l1xx_ll_tim.h | 332 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 2833 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 2844 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 2855 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/ |
D | stm32f0xx_ll_tim.h | 529 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 3382 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 3393 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 3404 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/ |
D | stm32f2xx_ll_tim.h | 532 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 3405 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 3416 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 3427 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/ |
D | stm32f1xx_ll_tim.h | 526 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 3267 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 3278 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 3289 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
D | stm32f4xx_ll_tim.h | 532 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 3462 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 3473 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 3484 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/ |
D | stm32wb0x_ll_tim.h | 593 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 3990 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4001 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4012 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_ll_tim.h | 634 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4384 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4395 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4406 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/ |
D | stm32u0xx_ll_tim.h | 631 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4415 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4426 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4437 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
D | stm32f7xx_ll_tim.h | 602 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4092 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4103 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4114 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/ |
D | stm32c0xx_ll_tim.h | 625 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4279 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4290 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4301 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/ |
D | stm32wlxx_ll_tim.h | 634 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4330 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4341 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4352 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/ |
D | stm32f3xx_ll_tim.h | 626 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4440 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4451 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4462 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/ |
D | stm32g0xx_ll_tim.h | 632 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4627 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4638 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4649 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_ll_tim.h | 623 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4459 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4470 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4481 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_ll_tim.h | 623 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4568 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4579 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4590 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/ |
D | stm32mp1xx_ll_tim.h | 579 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4394 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4405 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4416 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_ll_tim.h | 635 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 4379 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 4390 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 4401 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
D | stm32n6xx_ll_tim.h | 652 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 5471 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 5482 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 5493 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
D | stm32h7rsxx_ll_tim.h | 635 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 5300 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 5311 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 5322 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_ll_tim.h | 637 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 5310 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 5321 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 5332 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_ll_tim.h | 650 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 5770 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 5781 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 5792 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_ll_tim.h | 648 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 5690 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 5701 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 5712 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_ll_tim.h | 637 #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 5923 SET_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_EnableIT_UPDATE() 5934 CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); in LL_TIM_DisableIT_UPDATE() 5945 return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); in LL_TIM_IsEnabledIT_UPDATE()
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