| /hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/ |
| D | stm32l0xx_ll_tim.h | 3072 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
3083 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
3094 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| D | stm32l0xx_hal_tim.h | 586 #define TIM_DMA_CC2 TIM_DIER_CC2DE /*!< DMA request is…
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| /hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/ |
| D | stm32l1xx_ll_tim.h | 3104 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
3115 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
3126 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/ |
| D | stm32f0xx_ll_tim.h | 3719 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
3730 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
3741 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/ |
| D | stm32f2xx_ll_tim.h | 3742 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
3753 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
3764 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/ |
| D | stm32f1xx_ll_tim.h | 3604 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
3615 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
3626 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
| D | stm32f4xx_ll_tim.h | 3799 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
3810 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
3821 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/ |
| D | stm32wb0x_ll_tim.h | 4328 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4339 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4350 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
| D | stm32wbxx_ll_tim.h | 4721 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4732 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4743 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/ |
| D | stm32u0xx_ll_tim.h | 4752 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4763 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4774 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
| D | stm32f7xx_ll_tim.h | 4429 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4440 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4451 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/ |
| D | stm32c0xx_ll_tim.h | 4616 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4627 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4638 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/ |
| D | stm32wlxx_ll_tim.h | 4667 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4678 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4689 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/ |
| D | stm32f3xx_ll_tim.h | 4777 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4788 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4799 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/ |
| D | stm32g0xx_ll_tim.h | 4964 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4975 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4986 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_ll_tim.h | 4796 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4807 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4818 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_tim.h | 4905 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4916 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4927 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/ |
| D | stm32mp1xx_ll_tim.h | 4731 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4742 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4753 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_ll_tim.h | 4716 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
4727 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
4738 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_ll_tim.h | 5964 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
5975 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
5986 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_ll_tim.h | 5793 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
5804 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
5815 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
| D | stm32wbaxx_ll_tim.h | 5803 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
5814 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
5825 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_tim.h | 6263 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
6274 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
6285 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_tim.h | 6183 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
6194 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
6205 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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| /hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
| D | stm32g4xx_ll_tim.h | 6416 SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_EnableDMAReq_CC2()
6427 CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); in LL_TIM_DisableDMAReq_CC2()
6438 return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); in LL_TIM_IsEnabledDMAReq_CC2()
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