TIM_DCR_DBA_3 (reference) in projects: hal_stm32-latest

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched refs:TIM_DCR_DBA_3 (Results 1 – 25 of 300) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...12

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
D	stm32u0xx_ll_tim.h	1157 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1158 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1159 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1160 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1161 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1162 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1163 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1164 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1171 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1172 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_ll_tim.h	1145 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1146 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1147 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1148 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1149 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1150 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1151 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1152 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1158 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1159 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
D	stm32wb0x_ll_tim.h	1061 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1062 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1063 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1064 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1065 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1066 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1067 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1068 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1075 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1076 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) …
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
D	stm32g0xx_ll_tim.h	1167 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1168 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1169 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1170 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1171 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1172 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1173 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1174 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1181 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1182 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
D	stm32h7xx_ll_tim.h	1190 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1191 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1192 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1193 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1194 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1195 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1196 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1197 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1204 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1205 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
D	stm32mp1xx_ll_tim.h	1104 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1105 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1106 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1107 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1108 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1109 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1110 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1111 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1117 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1118 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
D	stm32wbxx_ll_tim.h	1164 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1165 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1166 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1167 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1168 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1169 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1170 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1171 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1178 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1179 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) …
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
D	stm32f7xx_ll_tim.h	1083 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1084 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1085 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1086 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1087 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1088 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1089 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1090 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1098 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1099 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) …
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
D	stm32wlxx_ll_tim.h	1134 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1135 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1136 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1137 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1138 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1139 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1140 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1141 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1148 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1149 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) …
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
D	stm32l4xx_ll_tim.h	1115 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1116 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1117 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1118 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1119 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1120 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1121 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1122 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1129 #define LL_TIM_DMABURST_BASEADDR_OR2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1130 #define LL_TIM_DMABURST_BASEADDR_OR3 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) …
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
D	stm32l5xx_ll_tim.h	1155 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1156 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1157 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1158 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1159 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1160 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1161 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1162 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1169 #define LL_TIM_DMABURST_BASEADDR_OR2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1170 #define LL_TIM_DMABURST_BASEADDR_OR3 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) …
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
D	stm32wbaxx_ll_tim.h	1219 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1220 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1221 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1222 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1223 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1224 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1225 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1226 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1235 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1236 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
D	stm32l0xx_ll_tim.h	630 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 631 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 632 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 633 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 634 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 635 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 636 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM…
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
D	stm32l1xx_ll_tim.h	626 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 627 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 628 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 629 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 630 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 631 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 632 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM…
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
D	stm32f0xx_ll_tim.h	880 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 881 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 882 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 883 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 884 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 885 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 886 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 887 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM…
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
D	stm32f2xx_ll_tim.h	883 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 884 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 885 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 886 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 887 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 888 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 889 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 890 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM…
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
D	stm32f1xx_ll_tim.h	876 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 877 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 878 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 879 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 880 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 881 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 882 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 883 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM…
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
D	stm32f4xx_ll_tim.h	883 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 884 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 885 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 886 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 887 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 888 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 889 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 890 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
D	stm32h5xx_ll_tim.h	1351 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1352 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1353 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1354 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1355 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1356 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1357 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1358 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1367 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1368 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_ll_tim.h	1366 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1367 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1368 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1369 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1370 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1371 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1372 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1373 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1382 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1383 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
D	stm32g4xx_ll_tim.h	1381 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1382 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1383 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1384 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1385 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1386 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1387 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1388 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1397 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1398 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … [all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
D	stm32n6xx_ll_tim.h	1291 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1292 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1293 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1294 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1295 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1296 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1297 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1298 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1307 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1308 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) …
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
D	stm32h7rsxx_ll_tim.h	1259 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1260 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1261 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1262 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1263 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1264 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1265 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1266 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM… 1275 #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3) … 1276 #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) …
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
D	stm32f3xx_ll_tim.h	1111 #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 … 1112 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) … 1113 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) … 1114 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) … 1115 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) … 1116 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) … 1117 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) … 1118 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM…
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
D	stm32f101x6.h	`4102 #define TIM_DCR_DBA_3 (0x08UL << TIM_DCR_DBA_Pos) /!< 0x00000008 / macro`

12 3 4 5 6 7 8 9 10 >>...12

Zephyr-2.7.6
Zephyr-3.6.0
Zephyr-3.7.1
Zephyr-4.0.0
Zephyr-4.1.0
Zephyr-latest
acpica-latest
babblesim_base-latest
babblesim_ext_2G4_channel_NtNcable-latest
babblesim_ext_2G4_channel_multiatt-latest
babblesim_ext_2G4_device_WLAN_actmod-latest
babblesim_ext_2G4_device_burst_interferer-latest
babblesim_ext_2G4_device_playback-latest
babblesim_ext_2G4_libPhyComv1-latest
babblesim_ext_2G4_modem_BLE_simple-latest
babblesim_ext_2G4_modem_magic-latest
babblesim_ext_2G4_phy_v1-latest
babblesim_ext_libCryptov1-latest
bsim-latest
cmsis-latest
cmsis-dsp-latest
cmsis-nn-latest
cmsis_6-latest
edtt-latest
fatfs-latest
hal_adi-latest
hal_altera-latest
hal_ambiq-latest
hal_atmel-latest
hal_espressif-latest
hal_ethos_u-latest
hal_gigadevice-latest
hal_infineon-latest
hal_intel-latest
hal_microchip-latest
hal_nordic-latest
hal_nuvoton-latest
hal_nxp-latest
hal_openisa-latest
hal_quicklogic-latest
hal_renesas-latest
hal_rpi_pico-latest
hal_silabs-latest
hal_st-latest
hal_stm32-latest
hal_tdk-latest
hal_telink-latest
hal_ti-latest
hal_wch-latest
hal_wurthelektronik-latest
hal_xtensa-latest
hostap-latest
liblc3-latest
libmctp-latest
libmetal-latest
littlefs-latest
loramac-node-latest
lvgl-latest
mbedtls-latest
mcuboot-latest
mipi-sys-t-latest
net-tools-latest
nrf_hw_models-latest
nrf_wifi-latest
open-amp-latest
openthread-latest
percepio-latest
picolibc-latest
segger-latest
tinycrypt-latest
trusted-firmware-a-latest
trusted-firmware-m-latest
uoscore-uedhoc-latest
zcbor-latest