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Searched refs:SYSCFG_CFGR1_FPU_IE_1 (Results 1 – 25 of 68) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_system.h519 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
579 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_DisableIT_FPU_DZC()
639 return ((READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1) == (SYSCFG_CFGR1_FPU_IE_1)) ? 1UL : 0UL); in LL_SYSCFG_IsEnabledIT_FPU_DZC()
Dstm32g4xx_hal.h86 #define SYSCFG_IT_FPU_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Floating Point Unit Divide-by-ze…
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_system.h575 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
635 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_DisableIT_FPU_DZC()
695 return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1) == (SYSCFG_CFGR1_FPU_IE_1)); in LL_SYSCFG_IsEnabledIT_FPU_DZC()
Dstm32l4xx_hal.h105 #define SYSCFG_IT_FPU_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Floating Point Unit Divide-by-ze…
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_system.h847 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
907 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_DisableIT_FPU_DZC()
967 return (READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1) == (SYSCFG_CFGR1_FPU_IE_1)); in LL_SYSCFG_IsEnabledIT_FPU_DZC()
Dstm32f3xx_hal.h399 #define HAL_SYSCFG_IT_FPU_DZC (SYSCFG_CFGR1_FPU_IE_1) /*!< Floating Point Unit Di…
406 … (((__INTERRUPT__) & SYSCFG_CFGR1_FPU_IE_1) == SYSCFG_CFGR1_FPU_IE_1) || \
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_system.h607 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
667 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_DisableIT_FPU_DZC()
727 return ((READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1) == (SYSCFG_CFGR1_FPU_IE_1)) ? 1UL : 0UL); in LL_SYSCFG_IsEnabledIT_FPU_DZC()
Dstm32wbxx_hal.h81 #define SYSCFG_IT_FPU_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Floating Point Unit Di…
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h6294 #define SYSCFG_CFGR1_FPU_IE_1 (0x02UL << SYSCFG_CFGR1_FPU_IE_Pos) /*!< 0x0800000… macro
Dstm32f318xx.h6284 #define SYSCFG_CFGR1_FPU_IE_1 (0x02UL << SYSCFG_CFGR1_FPU_IE_Pos) /*!< 0x0800000… macro
Dstm32f378xx.h9509 #define SYSCFG_CFGR1_FPU_IE_1 (0x02UL << SYSCFG_CFGR1_FPU_IE_Pos) /*!< 0x0800000… macro
Dstm32f373xc.h9608 #define SYSCFG_CFGR1_FPU_IE_1 (0x02UL << SYSCFG_CFGR1_FPU_IE_Pos) /*!< 0x0800000… macro
Dstm32f302x8.h9925 #define SYSCFG_CFGR1_FPU_IE_1 (0x02UL << SYSCFG_CFGR1_FPU_IE_Pos) /*!< 0x0800000… macro
Dstm32f328xx.h9707 #define SYSCFG_CFGR1_FPU_IE_1 (0x02UL << SYSCFG_CFGR1_FPU_IE_Pos) /*!< 0x0800000… macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h8241 #define SYSCFG_CFGR1_FPU_IE_1 (0x02U << SYSCFG_CFGR1_FPU_IE_Pos) /*!… macro
Dstm32wb1mxx.h8386 #define SYSCFG_CFGR1_FPU_IE_1 (0x02U << SYSCFG_CFGR1_FPU_IE_Pos) /*!… macro
Dstm32wb30xx.h8240 #define SYSCFG_CFGR1_FPU_IE_1 (0x02U << SYSCFG_CFGR1_FPU_IE_Pos) /*!… macro
Dstm32wb35xx.h9631 #define SYSCFG_CFGR1_FPU_IE_1 (0x02U << SYSCFG_CFGR1_FPU_IE_Pos) /*!… macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8214 #define SYSCFG_CFGR1_FPU_IE_1 (0x02U << SYSCFG_CFGR1_FPU_IE_Pos) /*!… macro
Dstm32wb15xx.h8386 #define SYSCFG_CFGR1_FPU_IE_1 (0x02U << SYSCFG_CFGR1_FPU_IE_Pos) /*!… macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h9107 #define SYSCFG_CFGR1_FPU_IE_1 (0x08000000U) /*!< Divide-by-zero… macro
Dstm32g411xc.h9295 #define SYSCFG_CFGR1_FPU_IE_1 (0x08000000U) /*!< Divide-by-zero… macro
Dstm32g441xx.h9879 #define SYSCFG_CFGR1_FPU_IE_1 (0x08000000U) /*!< Divide-by-zero… macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h7773 #define SYSCFG_CFGR1_FPU_IE_1 (0x08000000UL) /*!< Divide-by-zero… macro
Dstm32l412xx.h7548 #define SYSCFG_CFGR1_FPU_IE_1 (0x08000000UL) /*!< Divide-by-zero… macro

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