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Searched refs:RCC_CFGR_PLLMUL5 (Results 1 – 25 of 34) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h434 #define LL_RCC_PLL_MUL_5 RCC_CFGR_PLLMUL5 /*!< PLL input clock*5 */
Dstm32f0xx_hal_rcc.h459 #define RCC_PLL_MUL5 RCC_CFGR_PLLMUL5
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_rcc.h760 #define LL_RCC_PLL_MUL_5 RCC_CFGR_PLLMUL5 /*!< PLL input clock*5 */
Dstm32f3xx_hal_rcc.h492 #define RCC_PLL_MUL5 RCC_CFGR_PLLMUL5
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2879 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f030x8.h2909 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f070x6.h2934 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f031x6.h3005 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f030xc.h3166 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f038xx.h2980 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f070xb.h3026 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f058xx.h3429 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f051x8.h3454 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f071xb.h3850 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f042x6.h7173 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f048xx.h7149 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f072xb.h7620 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f091xc.h8075 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f098xx.h8051 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f078xx.h7596 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h4848 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f318xx.h4841 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f378xx.h7620 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f373xc.h7702 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro
Dstm32f302x8.h8456 #define RCC_CFGR_PLLMUL5 (0x000C0000U) /*!< PLL input clock… macro

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