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Searched refs:RCC_CFGR_PLLMUL2 (Results 1 – 25 of 34) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h431 #define LL_RCC_PLL_MUL_2 RCC_CFGR_PLLMUL2 /*!< PLL input clock*2 */
Dstm32f0xx_hal_rcc.h456 #define RCC_PLL_MUL2 RCC_CFGR_PLLMUL2
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_rcc.h757 #define LL_RCC_PLL_MUL_2 RCC_CFGR_PLLMUL2 /*!< PLL input clock*2 */
Dstm32f3xx_hal_rcc.h489 #define RCC_PLL_MUL2 RCC_CFGR_PLLMUL2
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h2876 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f030x8.h2906 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f070x6.h2931 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f031x6.h3002 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f030xc.h3163 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f038xx.h2977 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f070xb.h3023 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f058xx.h3426 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f051x8.h3451 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f071xb.h3847 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f042x6.h7170 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f048xx.h7146 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f072xb.h7617 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f091xc.h8072 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f098xx.h8048 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f078xx.h7593 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h4845 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f318xx.h4838 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f378xx.h7617 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f373xc.h7699 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro
Dstm32f302x8.h8453 #define RCC_CFGR_PLLMUL2 (0x00000000U) /*!< PLL input clock… macro

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