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Searched refs:PWR_SR1_WUF2_Pos (Results 1 – 25 of 72) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_pwr_ex.h278 #define PWR_FLAG_WUF2 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF2_Pos) /*!< Wakeu…
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_hal_pwr_ex.h152 #define PWR_FLAG_WUF2 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF2_Pos) /*!< Wakeup…
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_pwr_ex.h333 #define PWR_FLAG_WUF2 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF2_Pos) /*!< Wakeup ev…
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h3595 #define PWR_SR1_WUF2_Pos (1U) macro
3596 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32c031xx.h3602 #define PWR_SR1_WUF2_Pos (1U) macro
3603 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32c071xx.h3894 #define PWR_SR1_WUF2_Pos (1U) macro
3895 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h3626 #define PWR_SR1_WUF2_Pos (1U) macro
3627 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g050xx.h3645 #define PWR_SR1_WUF2_Pos (1U) macro
3646 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g070xx.h3660 #define PWR_SR1_WUF2_Pos (1U) macro
3661 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g031xx.h3802 #define PWR_SR1_WUF2_Pos (1U) macro
3803 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g041xx.h4038 #define PWR_SR1_WUF2_Pos (1U) macro
4039 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g051xx.h4138 #define PWR_SR1_WUF2_Pos (1U) macro
4139 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g061xx.h4374 #define PWR_SR1_WUF2_Pos (1U) macro
4375 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g071xx.h4359 #define PWR_SR1_WUF2_Pos (1U) macro
4360 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g081xx.h4595 #define PWR_SR1_WUF2_Pos (1U) macro
4596 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32g0b0xx.h4435 #define PWR_SR1_WUF2_Pos (1U) macro
4436 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h5421 #define PWR_SR1_WUF2_Pos (1U) macro
5422 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32wle5xx.h5421 #define PWR_SR1_WUF2_Pos (1U) macro
5422 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32wl5mxx.h6197 #define PWR_SR1_WUF2_Pos (1U) macro
6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32wl54xx.h6197 #define PWR_SR1_WUF2_Pos (1U) macro
6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32wl55xx.h6197 #define PWR_SR1_WUF2_Pos (1U) macro
6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4465 #define PWR_SR1_WUF2_Pos (1U) macro
4466 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32u083xx.h5128 #define PWR_SR1_WUF2_Pos (1U) macro
5129 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
Dstm32u073xx.h4870 #define PWR_SR1_WUF2_Pos (1U) macro
4871 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6430 #define PWR_SR1_WUF2_Pos (1U) macro
6431 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */

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