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Searched refs:APBENR1 (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1012 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM2EN); \
1014 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM2EN); \
1021 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
1023 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
1030 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM4EN); \
1032 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM4EN); \
1039 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN); \
1041 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN); \
1047 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN); \
1049 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN); \
[all …]
Dstm32g0xx_ll_bus.h470 SET_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_EnableClock()
472 tmpreg = READ_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_EnableClock()
542 return ((READ_BIT(RCC->APBENR1, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
611 CLEAR_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h857 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM2EN); \
859 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM2EN); \
865 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
867 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
873 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN); \
875 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM6EN); \
881 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN); \
883 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM7EN); \
889 SET_BIT(RCC->APBENR1, RCC_APBENR1_LPUART2EN); \
891 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_LPUART2EN); \
[all …]
Dstm32u0xx_ll_bus.h464 SET_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_EnableClock()
466 tmpreg = READ_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_EnableClock()
533 return (READ_BIT(RCC->APBENR1, Periphs) == Periphs); in LL_APB1_GRP1_IsEnabledClock()
598 CLEAR_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h799 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM2EN); \
801 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM2EN); \
808 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
810 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
816 SET_BIT(RCC->APBENR1, RCC_APBENR1_RTCAPBEN); \
818 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_RTCAPBEN); \
824 SET_BIT(RCC->APBENR1, RCC_APBENR1_WWDGEN); \
826 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_WWDGEN); \
833 SET_BIT(RCC->APBENR1, RCC_APBENR1_USBEN); \
835 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_USBEN); \
[all …]
Dstm32c0xx_ll_bus.h335 SET_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_EnableClock()
337 tmpreg = READ_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_EnableClock()
371 return ((READ_BIT(RCC->APBENR1, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
404 CLEAR_BIT(RCC->APBENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_rcc.c629 if (HAL_IS_BIT_CLR(RCC->APBENR1, RCC_APBENR1_PWREN)) in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h355 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32c031xx.h357 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32c071xx.h380 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h357 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g050xx.h362 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g070xx.h361 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g031xx.h382 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g041xx.h383 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g051xx.h422 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g061xx.h423 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g071xx.h439 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g081xx.h440 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g0b0xx.h369 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g0c1xx.h519 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
Dstm32g0b1xx.h518 …__IO uint32_t APBENR1; /*!< RCC APB peripherals clock enable register1, … member
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h483 …__IO uint32_t APBENR1; /*!< RCC APB1 peripherals clock enable register, … member
Dstm32u083xx.h543 …__IO uint32_t APBENR1; /*!< RCC APB1 peripherals clock enable register, … member
Dstm32u073xx.h509 …__IO uint32_t APBENR1; /*!< RCC APB1 peripherals clock enable register, … member