/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/ |
D | stm32l0xx_ll_rcc.h | 922 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Enable() 932 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Disable() 942 return ((READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == RCC_CRRCR_HSI48RDY) ? 1UL : 0UL); in LL_RCC_HSI48_IsReady() 952 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration() 963 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN); in LL_RCC_HSI48_EnableDivider() 973 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN); in LL_RCC_HSI48_DisableDivider() 983 return ((READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN) == RCC_CRRCR_HSI48DIV6OUTEN) ? 1UL : 0UL); in LL_RCC_HSI48_IsDivided()
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D | stm32l0xx_hal_rcc_ex.h | 1913 #define __HAL_RCC_HSI48_ENABLE() do { SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); \ 1920 #define __HAL_RCC_HSI48_DISABLE() do { CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); \ 1930 … (((uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON)) != 0U) ? RCC_HSI48_ON : RCC_HSI48_OFF)
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D | stm32l0xx_hal_rcc.h | 1662 …G_INDEX)? RCC->CR :((((__FLAG__) >> 5) == CSR_REG_INDEX) ? RCC->CSR :RCC->CRRCR)))) & ((uint32_t)1…
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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/src/ |
D | stm32l5xx_hal_rcc.c | 371 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in HAL_RCC_DeInit() 931 while (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == 0U) in HAL_RCC_OscConfig() 936 if (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == 0U) in HAL_RCC_OscConfig() 952 while (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) != 0U) in HAL_RCC_OscConfig() 957 if (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) != 0U) in HAL_RCC_OscConfig() 1651 if ((RCC->CRRCR & RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON) in HAL_RCC_GetOscConfig()
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D | stm32l5xx_hal_rcc_ex.c | 962 if (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) /* HSI48 ? */ in HAL_RCCEx_GetPeriphCLKFreq() 1044 if (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) /* HSI48 ? */ in HAL_RCCEx_GetPeriphCLKFreq()
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/src/ |
D | stm32g4xx_hal_rcc.c | 583 while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == 0U) in HAL_RCC_OscConfig() 600 while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) != 0U) in HAL_RCC_OscConfig() 1215 if(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON) in HAL_RCC_GetOscConfig()
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D | stm32g4xx_hal_rcc_ex.c | 1118 …else if((HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) && (srcclk == RCC_USBCLKSOURCE_HSI48)) /*… in HAL_RCCEx_GetPeriphCLKFreq() 1140 …else if( (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) && (srcclk == RCC_RNGCLKSOURCE_HSI48)) /… in HAL_RCCEx_GetPeriphCLKFreq()
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_ll_rcc.h | 1079 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Enable() 1089 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Disable() 1099 return ((READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == (RCC_CRRCR_HSI48RDY)) ? 1UL : 0UL); in LL_RCC_HSI48_IsReady() 1109 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
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D | stm32g4xx_hal_rcc.h | 2902 #define __HAL_RCC_HSI48_ENABLE() SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) 2904 #define __HAL_RCC_HSI48_DISABLE() CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) 3219 … ((((__FLAG__) >> 5U) == 4U) ? RCC->CRRCR : \
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/src/ |
D | stm32l0xx_ll_rcc.c | 167 CLEAR_BIT(RCC->CRRCR, (RCC_CRRCR_HSI48ON | RCC_CRRCR_HSI48DIV6OUTEN)); in LL_RCC_DeInit() 169 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_DeInit()
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D | stm32l0xx_hal_rcc_ex.c | 498 if (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/src/ |
D | stm32l4xx_hal_rcc.c | 847 while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == 0U) in HAL_RCC_OscConfig() 864 while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) != 0U) in HAL_RCC_OscConfig() 1629 if(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON) in HAL_RCC_GetOscConfig()
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D | stm32l4xx_hal_rcc_ex.c | 1327 if(HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) /* HSI48 ? */ in HAL_RCCEx_GetPeriphCLKFreq() 1410 if(HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) /* HSI48 ? */ in HAL_RCCEx_GetPeriphCLKFreq()
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_ll_rcc.h | 1576 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Enable() 1586 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Disable() 1596 return ((READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == (RCC_CRRCR_HSI48RDY)) ? 1UL : 0UL); in LL_RCC_HSI48_IsReady() 1606 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
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D | stm32wbxx_hal_rcc.h | 3363 … ((((__FLAG__) >> 5U) == CRRCR_REG_INDEX) ? RCC->CRRCR : \
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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_ll_rcc.h | 1640 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Enable() 1650 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Disable() 1660 return ((READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == RCC_CRRCR_HSI48RDY) ? 1UL : 0UL); in LL_RCC_HSI48_IsReady() 1670 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
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D | stm32l5xx_hal_rcc.h | 2967 #define __HAL_RCC_HSI48_ENABLE() SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) 2969 #define __HAL_RCC_HSI48_DISABLE() CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) 3313 … ((((__FLAG__) >> 5U) == CRRCR_REG_INDEX) ? RCC->CRRCR : \
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/ |
D | system_stm32wbxx.c | 238 RCC->CRRCR &= (uint32_t)0xFFFFFFFEU; in SystemInit()
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_ll_rcc.h | 2221 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Enable() 2231 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Disable() 2241 return ((READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == RCC_CRRCR_HSI48RDY) ? 1UL : 0UL); in LL_RCC_HSI48_IsReady() 2251 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
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D | stm32l4xx_hal_rcc.h | 4181 #define __HAL_RCC_HSI48_ENABLE() SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) 4183 #define __HAL_RCC_HSI48_DISABLE() CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) 4597 ((((__FLAG__) >> 5U) == 4U) ? RCC->CRRCR : \
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/src/ |
D | stm32wbxx_hal_rcc.c | 1584 regvalue = RCC->CRRCR; in HAL_RCC_GetOscConfig()
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/ |
D | stm32g0xx_ll_rcc.h | 1450 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
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D | stm32g0xx_hal_rcc.h | 3051 ((((__FLAG__) >> 5U) == CRRCR_REG_INDEX) ? RCC->CRRCR : \
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_ll_rcc.h | 1699 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
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/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_ll_rcc.h | 1894 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
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