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Searched refs:vdiv (Results 1 – 25 of 51) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk22f/
Dclock_config.c159 .vdiv = 0x10U, /* VCO divider: multiplied by 40 */
261 .vdiv = 0x0U, /* VCO divider: multiplied by 24 */
377 .vdiv = 0x6U, /* VCO divider: multiplied by 30 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmkv31f/
Dclock_config.c158 .vdiv = 0x6U, /* VCO divider: multiplied by 30 */
264 .vdiv = 0x0U, /* VCO divider: multiplied by 24 */
375 .vdiv = 0x10U, /* VCO divider: multiplied by 40 */
/hal_nxp-latest/mcux/mcux-sdk/boards/hvpkv31f120m/
Dclock_config.c147 .vdiv = 0x0U, /* VCO divider: multiplied by 24 */
245 .vdiv = 0x0U, /* VCO divider: multiplied by 24 */
346 .vdiv = 0x0U, /* VCO divider: multiplied by 24 */
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkv58f220m/
Dclock_config.c156 .vdiv = 0x8U, /* VCO divider: multiplied by 24 */
249 .vdiv = 0x10U, /* VCO divider: multiplied by 32 */
350 .vdiv = 0x16U, /* VCO divider: multiplied by 38 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk28fa/
Dclock_config.c156 .vdiv = 0x4U, /* VCO divider: multiplied by 20 */
247 .vdiv = 0x0U, /* VCO divider: multiplied by 16 */
355 .vdiv = 0x9U, /* VCO divider: multiplied by 25 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk66f/
Dclock_config.c167 .vdiv = 0xeU, /* VCO divider: multiplied by 30 */
276 .vdiv = 0x0U, /* VCO divider: multiplied by 16 */
394 .vdiv = 0x4U, /* VCO divider: multiplied by 20 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk64f/
Dclock_config.c162 .vdiv = 0x18U, /* VCO divider: multiplied by 48 */
262 .vdiv = 0x0U, /* VCO divider: multiplied by 24 */
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/drivers/
Dfsl_clock.c661 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
718 *vdiv = vdiv_cur - FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
747 *vdiv = ret_vdiv - FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
767 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
Dfsl_clock.h538 uint8_t vdiv; /*!< VCO divider VDIV. */ member
914 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv);
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/drivers/
Dfsl_clock.c714 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
771 *vdiv = vdiv_cur - FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
800 *vdiv = ret_vdiv - FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
820 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
Dfsl_clock.h568 uint8_t vdiv; /*!< VCO divider VDIV. */ member
966 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv);
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/drivers/
Dfsl_clock.c714 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
771 *vdiv = vdiv_cur - FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
800 *vdiv = ret_vdiv - FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
820 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
Dfsl_clock.h568 uint8_t vdiv; /*!< VCO divider VDIV. */ member
966 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv);
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/drivers/
Dfsl_clock.c830 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
892 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
921 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
952 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/drivers/
Dfsl_clock.c830 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
892 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
921 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
952 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/drivers/
Dfsl_clock.c889 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
949 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
978 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1009 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/drivers/
Dfsl_clock.c874 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
934 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
963 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
994 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/drivers/
Dfsl_clock.c887 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
947 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
976 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1007 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/drivers/
Dfsl_clock.c944 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
1006 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1035 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1066 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/drivers/
Dfsl_clock.c894 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
954 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
983 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1014 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/drivers/
Dfsl_clock.c893 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
953 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
982 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1013 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/drivers/
Dfsl_clock.c925 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
985 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1014 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1045 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/drivers/
Dfsl_clock.c937 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
997 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1026 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1057 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/drivers/
Dfsl_clock.c904 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
964 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
993 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1024 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/drivers/
Dfsl_clock.c944 uint32_t CLOCK_CalcPllDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *prdiv, uint8_t *vdiv) in CLOCK_CalcPllDiv() argument
1006 *vdiv = vdiv_cur - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1035 *vdiv = ret_vdiv - (uint8_t)FSL_FEATURE_MCG_PLL_VDIV_BASE; in CLOCK_CalcPllDiv()
1066 MCG->C6 = (uint8_t)((MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv)); in CLOCK_EnablePll0()

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