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Searched refs:kMCG_Dmx32Default (Results 1 – 25 of 45) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk22f/
Dclock_config.c153 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
255 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
371 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmkv31f/
Dclock_config.c152 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
258 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
369 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/hvpkv31f120m/
Dclock_config.c141 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
239 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
340 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkv58f220m/
Dclock_config.c151 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
244 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
345 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk28fa/
Dclock_config.c150 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
241 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
349 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk66f/
Dclock_config.c161 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
270 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
388 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmkv11z/
Dclock_config.c141 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
229 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/hvpkv11z75m/
Dclock_config.c141 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
230 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk64f/
Dclock_config.c156 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
256 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkm34z75m/
Dclock_config.c266 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkm34z50mv3/
Dclock_config.c250 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkm35z75m/
Dclock_config.c272 .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/drivers/
Dfsl_clock.h440 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/drivers/
Dfsl_clock.h411 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/drivers/
Dfsl_clock.h383 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/drivers/
Dfsl_clock.h411 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/drivers/
Dfsl_clock.h379 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/drivers/
Dfsl_clock.h383 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/drivers/
Dfsl_clock.h444 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/drivers/
Dfsl_clock.h420 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/drivers/
Dfsl_clock.h419 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/drivers/
Dfsl_clock.h449 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/drivers/
Dfsl_clock.h449 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/drivers/
Dfsl_clock.h451 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/drivers/
Dfsl_clock.h436 kMCG_Dmx32Default, /*!< DCO has a default range of 25% */ enumerator

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