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Searched refs:DMA0 (Results 1 – 25 of 341) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/template/
DRTE_Device.h65 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
67 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
72 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
74 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
79 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
81 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
86 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
88 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
93 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
95 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/template/
DRTE_Device.h65 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
67 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
72 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
74 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
79 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
81 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
86 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
88 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
93 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
95 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/template/
DRTE_Device.h65 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
67 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
72 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
74 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
79 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
81 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
86 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
88 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
93 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
95 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/template/
DRTE_Device.h55 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
57 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
62 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
64 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
69 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
71 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
76 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
78 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
83 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
85 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/template/
DRTE_Device.h53 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
55 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
60 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
62 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
67 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
69 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
74 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
76 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
81 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
83 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/template/
DRTE_Device.h53 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
55 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
60 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
62 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
67 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
69 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
74 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
76 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
81 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
83 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/template/
DRTE_Device.h55 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
57 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
62 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
64 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
69 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
71 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
76 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
78 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
83 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
85 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/template/
DRTE_Device.h55 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
57 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
62 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
64 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
69 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
71 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
76 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
78 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
83 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
85 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/template/
DRTE_Device.h54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/template/
DRTE_Device.h47 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
49 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
54 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/template/
DRTE_Device.h47 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
49 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
54 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/template/
DRTE_Device.h49 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
51 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
56 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
58 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
63 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
65 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
70 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
72 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
77 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
79 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/template/
DRTE_Device.h48 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
50 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
55 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
57 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
62 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
64 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
69 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
71 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
76 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
78 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/template/
DRTE_Device.h48 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
50 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
55 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
57 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
62 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
64 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
69 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
71 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
76 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
78 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/template/
DRTE_Device.h48 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
50 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
55 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
57 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
62 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
64 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
69 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
71 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
76 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
78 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/template/
DRTE_Device.h48 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
50 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
55 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
57 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
62 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
64 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
69 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
71 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
76 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
78 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
[all …]

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