Lines Matching refs:DMA0
54 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
56 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
61 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
63 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
68 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
70 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
75 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
77 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
82 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
84 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
89 #define RTE_USART5_DMA_TX_DMA_BASE DMA0
91 #define RTE_USART5_DMA_RX_DMA_BASE DMA0
96 #define RTE_USART6_DMA_TX_DMA_BASE DMA0
98 #define RTE_USART6_DMA_RX_DMA_BASE DMA0
103 #define RTE_USART7_DMA_TX_DMA_BASE DMA0
105 #define RTE_USART7_DMA_RX_DMA_BASE DMA0
110 #define RTE_USART8_DMA_TX_DMA_BASE DMA0
112 #define RTE_USART8_DMA_RX_DMA_BASE DMA0
117 #define RTE_USART9_DMA_TX_DMA_BASE DMA0
119 #define RTE_USART9_DMA_RX_DMA_BASE DMA0
146 #define RTE_I2C0_Master_DMA_BASE DMA0
149 #define RTE_I2C1_Master_DMA_BASE DMA0
152 #define RTE_I2C2_Master_DMA_BASE DMA0
155 #define RTE_I2C3_Master_DMA_BASE DMA0
158 #define RTE_I2C4_Master_DMA_BASE DMA0
161 #define RTE_I2C5_Master_DMA_BASE DMA0
164 #define RTE_I2C6_Master_DMA_BASE DMA0
167 #define RTE_I2C7_Master_DMA_BASE DMA0
170 #define RTE_I2C8_Master_DMA_BASE DMA0
173 #define RTE_I2C9_Master_DMA_BASE DMA0
205 #define RTE_SPI0_DMA_TX_DMA_BASE DMA0
207 #define RTE_SPI0_DMA_RX_DMA_BASE DMA0
213 #define RTE_SPI1_DMA_TX_DMA_BASE DMA0
215 #define RTE_SPI1_DMA_RX_DMA_BASE DMA0
221 #define RTE_SPI2_DMA_TX_DMA_BASE DMA0
223 #define RTE_SPI2_DMA_RX_DMA_BASE DMA0
229 #define RTE_SPI3_DMA_TX_DMA_BASE DMA0
231 #define RTE_SPI3_DMA_RX_DMA_BASE DMA0
237 #define RTE_SPI4_DMA_TX_DMA_BASE DMA0
239 #define RTE_SPI4_DMA_RX_DMA_BASE DMA0
245 #define RTE_SPI5_DMA_TX_DMA_BASE DMA0
247 #define RTE_SPI5_DMA_RX_DMA_BASE DMA0
253 #define RTE_SPI6_DMA_TX_DMA_BASE DMA0
255 #define RTE_SPI6_DMA_RX_DMA_BASE DMA0
261 #define RTE_SPI7_DMA_TX_DMA_BASE DMA0
263 #define RTE_SPI7_DMA_RX_DMA_BASE DMA0
269 #define RTE_SPI8_DMA_TX_DMA_BASE DMA0
271 #define RTE_SPI8_DMA_RX_DMA_BASE DMA0
277 #define RTE_SPI9_DMA_TX_DMA_BASE DMA0
279 #define RTE_SPI9_DMA_RX_DMA_BASE DMA0