Lines Matching refs:DMA0
53 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
55 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
60 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
62 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
67 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
69 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
74 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
76 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
81 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
83 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
88 #define RTE_USART5_DMA_TX_DMA_BASE DMA0
90 #define RTE_USART5_DMA_RX_DMA_BASE DMA0
95 #define RTE_USART6_DMA_TX_DMA_BASE DMA0
97 #define RTE_USART6_DMA_RX_DMA_BASE DMA0
102 #define RTE_USART7_DMA_TX_DMA_BASE DMA0
104 #define RTE_USART7_DMA_RX_DMA_BASE DMA0
109 #define RTE_USART8_DMA_TX_DMA_BASE DMA0
111 #define RTE_USART8_DMA_RX_DMA_BASE DMA0
116 #define RTE_USART9_DMA_TX_DMA_BASE DMA0
118 #define RTE_USART9_DMA_RX_DMA_BASE DMA0
145 #define RTE_I2C0_Master_DMA_BASE DMA0
148 #define RTE_I2C1_Master_DMA_BASE DMA0
151 #define RTE_I2C2_Master_DMA_BASE DMA0
154 #define RTE_I2C3_Master_DMA_BASE DMA0
157 #define RTE_I2C4_Master_DMA_BASE DMA0
160 #define RTE_I2C5_Master_DMA_BASE DMA0
163 #define RTE_I2C6_Master_DMA_BASE DMA0
166 #define RTE_I2C7_Master_DMA_BASE DMA0
169 #define RTE_I2C8_Master_DMA_BASE DMA0
172 #define RTE_I2C9_Master_DMA_BASE DMA0
204 #define RTE_SPI0_DMA_TX_DMA_BASE DMA0
206 #define RTE_SPI0_DMA_RX_DMA_BASE DMA0
212 #define RTE_SPI1_DMA_TX_DMA_BASE DMA0
214 #define RTE_SPI1_DMA_RX_DMA_BASE DMA0
220 #define RTE_SPI2_DMA_TX_DMA_BASE DMA0
222 #define RTE_SPI2_DMA_RX_DMA_BASE DMA0
228 #define RTE_SPI3_DMA_TX_DMA_BASE DMA0
230 #define RTE_SPI3_DMA_RX_DMA_BASE DMA0
236 #define RTE_SPI4_DMA_TX_DMA_BASE DMA0
238 #define RTE_SPI4_DMA_RX_DMA_BASE DMA0
244 #define RTE_SPI5_DMA_TX_DMA_BASE DMA0
246 #define RTE_SPI5_DMA_RX_DMA_BASE DMA0
252 #define RTE_SPI6_DMA_TX_DMA_BASE DMA0
254 #define RTE_SPI6_DMA_RX_DMA_BASE DMA0
260 #define RTE_SPI7_DMA_TX_DMA_BASE DMA0
262 #define RTE_SPI7_DMA_RX_DMA_BASE DMA0
268 #define RTE_SPI8_DMA_TX_DMA_BASE DMA0
270 #define RTE_SPI8_DMA_RX_DMA_BASE DMA0
276 #define RTE_SPI9_DMA_TX_DMA_BASE DMA0
278 #define RTE_SPI9_DMA_RX_DMA_BASE DMA0