Lines Matching refs:DMA0
55 #define RTE_USART0_DMA_TX_DMA_BASE DMA0
57 #define RTE_USART0_DMA_RX_DMA_BASE DMA0
62 #define RTE_USART1_DMA_TX_DMA_BASE DMA0
64 #define RTE_USART1_DMA_RX_DMA_BASE DMA0
69 #define RTE_USART2_DMA_TX_DMA_BASE DMA0
71 #define RTE_USART2_DMA_RX_DMA_BASE DMA0
76 #define RTE_USART3_DMA_TX_DMA_BASE DMA0
78 #define RTE_USART3_DMA_RX_DMA_BASE DMA0
83 #define RTE_USART4_DMA_TX_DMA_BASE DMA0
85 #define RTE_USART4_DMA_RX_DMA_BASE DMA0
90 #define RTE_USART5_DMA_TX_DMA_BASE DMA0
92 #define RTE_USART5_DMA_RX_DMA_BASE DMA0
97 #define RTE_USART6_DMA_TX_DMA_BASE DMA0
99 #define RTE_USART6_DMA_RX_DMA_BASE DMA0
104 #define RTE_USART7_DMA_TX_DMA_BASE DMA0
106 #define RTE_USART7_DMA_RX_DMA_BASE DMA0
111 #define RTE_USART8_DMA_TX_DMA_BASE DMA0
113 #define RTE_USART8_DMA_RX_DMA_BASE DMA0
118 #define RTE_USART9_DMA_TX_DMA_BASE DMA0
120 #define RTE_USART9_DMA_RX_DMA_BASE DMA0
147 #define RTE_I2C0_Master_DMA_BASE DMA0
150 #define RTE_I2C1_Master_DMA_BASE DMA0
153 #define RTE_I2C2_Master_DMA_BASE DMA0
156 #define RTE_I2C3_Master_DMA_BASE DMA0
159 #define RTE_I2C4_Master_DMA_BASE DMA0
162 #define RTE_I2C5_Master_DMA_BASE DMA0
165 #define RTE_I2C6_Master_DMA_BASE DMA0
168 #define RTE_I2C7_Master_DMA_BASE DMA0
171 #define RTE_I2C8_Master_DMA_BASE DMA0
174 #define RTE_I2C9_Master_DMA_BASE DMA0
206 #define RTE_SPI0_DMA_TX_DMA_BASE DMA0
208 #define RTE_SPI0_DMA_RX_DMA_BASE DMA0
214 #define RTE_SPI1_DMA_TX_DMA_BASE DMA0
216 #define RTE_SPI1_DMA_RX_DMA_BASE DMA0
222 #define RTE_SPI2_DMA_TX_DMA_BASE DMA0
224 #define RTE_SPI2_DMA_RX_DMA_BASE DMA0
230 #define RTE_SPI3_DMA_TX_DMA_BASE DMA0
232 #define RTE_SPI3_DMA_RX_DMA_BASE DMA0
238 #define RTE_SPI4_DMA_TX_DMA_BASE DMA0
240 #define RTE_SPI4_DMA_RX_DMA_BASE DMA0
246 #define RTE_SPI5_DMA_TX_DMA_BASE DMA0
248 #define RTE_SPI5_DMA_RX_DMA_BASE DMA0
254 #define RTE_SPI6_DMA_TX_DMA_BASE DMA0
256 #define RTE_SPI6_DMA_RX_DMA_BASE DMA0
262 #define RTE_SPI7_DMA_TX_DMA_BASE DMA0
264 #define RTE_SPI7_DMA_RX_DMA_BASE DMA0
270 #define RTE_SPI8_DMA_TX_DMA_BASE DMA0
272 #define RTE_SPI8_DMA_RX_DMA_BASE DMA0
278 #define RTE_SPI9_DMA_TX_DMA_BASE DMA0
280 #define RTE_SPI9_DMA_RX_DMA_BASE DMA0