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Searched refs:SRSS_NUM_PLL (Results 1 – 19 of 19) sorted by relevance

/hal_infineon-latest/mtb-hal-cat1/include_pvt/
Dcyhal_clock_impl.h38 #if !defined(SRSS_NUM_PLL)
41 #define SRSS_NUM_PLL SRSS_NUM_TOTAL_DPLL macro
43 #define SRSS_NUM_PLL (SRSS_NUM_PLL200M + SRSS_NUM_PLL400M)
52 #define _CYHAL_SRSS_NUM_PLL (SRSS_NUM_PLL + SRSS_NUM_PLL400M)
54 #define _CYHAL_SRSS_NUM_PLL SRSS_NUM_PLL
284 #if (SRSS_NUM_PLL > 0) && defined(SRSS_HT_VARIANT) && (SRSS_HT_VARIANT > 0)
Dcyhal_hw_resources.h95 #define SRSS_NUM_PLL200M SRSS_NUM_PLL
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_hwmgr_impl_part.h182 #define CY_CHANNEL_COUNT_CLOCK (12 + 7 + SRSS_NUM_CLKPATH + SRSS_NUM_PLL + SRSS_NUM_HFROOT + P…
186 #define CY_CHANNEL_COUNT_CLOCK (13 + 6 + SRSS_NUM_CLKPATH + SRSS_NUM_PLL + SRSS_NUM_HFROOT + P…
195 #define CY_CHANNEL_COUNT_CLOCK (14 + 2 + SRSS_NUM_CLKPATH + SRSS_NUM_PLL + SRSS_NUM_PLL400M + …
629 #if ((PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL + SRSS_NUM_HFROOT + 18) >= 256)
638 #define _SRSS_NUM_PLL (SRSS_NUM_PLL + SRSS_NUM_PLL400M)
641 #define _SRSS_NUM_PLL (SRSS_NUM_PLL)
675 …PERI_DIV_NR + _CYHAL_SRSS_NUM_ILO + _SRSS_NUM_PILO + SRSS_NUM_CLKPATH + 8 + SRSS_NUM_PLL, // PLL…
758 #if ((PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL + SRSS_NUM_HFROOT + 18) >= 256)
913 #if ((PERI_DIV_NR + SRSS_NUM_CLKPATH + SRSS_NUM_PLL + SRSS_NUM_HFROOT + 18) >= 256)
984 …PERI_DIV_NR + _CYHAL_SRSS_NUM_ILO + SRSS_NUM_CLKPATH + SRSS_NUM_PLL + 5, …
[all …]
Dcyhal_utils_impl.c369 return SRSS_NUM_PLL; in _cyhal_utils_get_clock_count()
701 #if (SRSS_NUM_PLL > 0) in _cyhal_utils_find_hf_source_n_divider()
702 … || ((sources[i]->channel_num > 0) && (sources[i]->channel_num <= SRSS_NUM_PLL) && in _cyhal_utils_find_hf_source_n_divider()
707 …|| ((sources[i]->channel_num > SRSS_NUM_PLL) && (sources[i]->channel_num <= SRSS_NUM_PLL + SRSS_NU… in _cyhal_utils_find_hf_source_n_divider()
712 …|| ((sources[i]->channel_num > SRSS_NUM_PLL) && (sources[i]->channel_num <= SRSS_NUM_PLL + SRSS_NU… in _cyhal_utils_find_hf_source_n_divider()
Dcyhal_usb_dev.c224 for (uint8_t path = 1u; path <= SRSS_NUM_PLL; ++path) in _cyhal_usb_dev_reserve_pll()
293 for (uint32_t path = 1U; path <= SRSS_NUM_PLL; ++path) in _cyhal_usb_dev_hf_clock_setup()
Dcyhal_clock.c3294 #if (SRSS_NUM_PLL > 0)
3599 #if (SRSS_NUM_PLL > 0) in _cyhal_clock_get_funcs_all()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h311 #define CY_SRSS_NUM_PLL200M (SRSS_NUM_PLL)
320 #define CY_SRSS_PLL_PRESENT (SRSS_NUM_PLL)
485 #define CY_SRSS_PLL_PRESENT SRSS_NUM_PLL
Dpsoc6_01_config.h2970 #define SRSS_NUM_PLL 1u macro
Dpsoc6_03_config.h3021 #define SRSS_NUM_PLL 1u macro
Dpsoc6_04_config.h3049 #define SRSS_NUM_PLL 1u macro
Dpsoc6_02_config.h3837 #define SRSS_NUM_PLL 2u macro
Dfx3g2_config.h3724 #define SRSS_NUM_PLL 2u macro
Dtviibe1m_config.h3715 #define SRSS_NUM_PLL 1u macro
Dtviibe2m_config.h3885 #define SRSS_NUM_PLL 1u macro
Dtviibe4m_config.h3890 #define SRSS_NUM_PLL 1u macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h127 #define CY_SRSS_NUM_PLL200M SRSS_NUM_PLL
132 #define CY_SRSS_PLL_PRESENT SRSS_NUM_PLL
Dxmc7100_config.h4531 #define SRSS_NUM_PLL 2u macro
Dtviic2d6m_config.h5108 #define SRSS_NUM_PLL 3u macro
Dxmc7200_config.h5191 #define SRSS_NUM_PLL 2u macro