Home
last modified time | relevance | path

Searched refs:CPUSS_SRAM2_SIZE (Results 1 – 12 of 12) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device_common.h425 #define CPUSS_SRAM2_SIZE 256u macro
Dpsoc6_01_config.h1679 #define CPUSS_SRAM2_SIZE 256u macro
Dpsoc6_03_config.h1330 #define CPUSS_SRAM2_SIZE 1u macro
Dpsoc6_04_config.h1292 #define CPUSS_SRAM2_SIZE 1u macro
Dpsoc6_02_config.h1805 #define CPUSS_SRAM2_SIZE 256u macro
Dfx3g2_config.h1962 #define CPUSS_SRAM2_SIZE 1u macro
Dtviibe1m_config.h1781 #define CPUSS_SRAM2_SIZE 1u macro
Dtviibe2m_config.h1940 #define CPUSS_SRAM2_SIZE 1u macro
Dtviibe4m_config.h1941 #define CPUSS_SRAM2_SIZE 1u macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h2024 #define CPUSS_SRAM2_SIZE 256u macro
Dtviic2d6m_config.h2176 #define CPUSS_SRAM2_SIZE 128u macro
Dxmc7200_config.h2609 #define CPUSS_SRAM2_SIZE 256u macro