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Searched refs:en2_clr (Results 1 – 19 of 19) sorted by relevance

/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/GPIO/
Dgpio_revb.c40 gpio->en2_clr = cfg->mask; in MXC_GPIO_RevB_Config()
47 gpio->en2_clr = cfg->mask; in MXC_GPIO_RevB_Config()
53 gpio->en2_clr = cfg->mask; in MXC_GPIO_RevB_Config()
59 gpio->en2_clr = cfg->mask; in MXC_GPIO_RevB_Config()
65 gpio->en2_clr = cfg->mask; in MXC_GPIO_RevB_Config()
Dgpio_reva.c154 port->en2_clr = mask; in MXC_GPIO_RevA_SetAF()
162 port->en2_clr = mask; in MXC_GPIO_RevA_SetAF()
168 port->en2_clr = mask; in MXC_GPIO_RevA_SetAF()
175 port->en2_clr = mask; in MXC_GPIO_RevA_SetAF()
198 port->en2_clr = mask; in MXC_GPIO_RevA_SetAF()
Dgpio_me11.c77 gpio->en2_clr = cfg->mask; in MXC_GPIO_Config()
84 gpio->en2_clr = cfg->mask; in MXC_GPIO_Config()
90 gpio->en2_clr = cfg->mask; in MXC_GPIO_Config()
96 gpio->en2_clr = cfg->mask; in MXC_GPIO_Config()
Dgpio_reva_regs.h106 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO_REVA EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32670/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32665/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32675/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32570/Include/
Dgpio_regs.h107 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX78002/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX78000/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32672/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32662/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32680/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32690/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32660/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32655/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32572/Include/
Dgpio_regs.h108 __IO uint32_t en2_clr; /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */ member
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/SPIXF/
Dspixf_me55.c64 port->en2_clr = cfg->mask; in MXC_GPIO_Config_SPIXF()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/AFE/
Dhart_uart.c742 HART_CLK_GPIO_PORT->en2_clr = HART_CLK_GPIO_PIN; in idle_hart_clock_pin()