Searched refs:MXC_BASE_SPI0 (Results 1 – 14 of 14) sorted by relevance
391 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro392 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)398 #define MXC_SPI_GET_BASE(i) ((i) == 0 ? MXC_BASE_SPI0 : (i) == 1 ? MXC_BASE_SPI1 : 0)
452 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro453 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)459 #define MXC_SPI_GET_BASE(i) ((i) == 0 ? MXC_BASE_SPI0 : (i) == 1 ? MXC_BASE_SPI1 : 0)
475 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro476 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)485 ((i) == 0 ? MXC_BASE_SPI0 : (i) == 1 ? MXC_BASE_SPI1 : (i) == 2 ? MXC_BASE_SPI2 : 0)
511 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro512 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)521 ((i) == 0 ? MXC_BASE_SPI0 : (i) == 1 ? MXC_BASE_SPI1 : (i) == 2 ? MXC_BASE_SPI2 : 0)
474 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro475 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)484 ((i) == 0 ? MXC_BASE_SPI0 : (i) == 1 ? MXC_BASE_SPI1 : (i) == 2 ? MXC_BASE_SPI2 : 0)
618 #define MXC_BASE_SPI0 ((uint32_t)0x400BE000UL) macro619 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)625 #define MXC_SPI_GET_BASE(i) ((i) == 0 ? MXC_BASE_SPI1 : (i) == 1 ? MXC_BASE_SPI0 : 0)
629 #define MXC_BASE_SPI0 ((uint32_t)0x400BE000UL) macro630 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)635 #define MXC_SPI_GET_BASE(i) ((i) == 0 ? MXC_BASE_SPI1 : (i) == 1 ? MXC_BASE_SPI0 : 0)
623 #define MXC_BASE_SPI0 ((uint32_t)0x400BE000UL) macro624 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)629 #define MXC_SPI_GET_BASE(i) ((i) == 0 ? MXC_BASE_SPI1 : (i) == 1 ? MXC_BASE_SPI0 : 0)
601 #define MXC_BASE_SPI0 ((uint32_t)0x400BE000UL) macro602 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)607 #define MXC_SPI_GET_BASE(i) ((i) == 0 ? MXC_BASE_SPI1 : (i) == 1 ? MXC_BASE_SPI0 : 0)
759 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro760 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)781 ((i) == 0 ? MXC_BASE_SPI0 : \808 ((i) == 0 ? MXC_BASE_SPI0 : (i) == 1 ? MXC_BASE_SPI1 : (i) == 2 ? MXC_BASE_SPI2 : 0)
621 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro622 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)634 ((i) == 0 ? MXC_BASE_SPI0 : \
662 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro663 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)673 ((i) == 0 ? MXC_BASE_SPI0 : (i) == 1 ? MXC_BASE_SPI1 : (i) == 3 ? MXC_BASE_SPI3 : 0)
689 #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) macro690 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)702 ((i) == 0 ? MXC_BASE_SPI0 : \
786 #define MXC_BASE_SPI0 ((uint32_t)0x400BE000UL) macro787 #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0)796 ((i) == 0 ? MXC_BASE_SPI0 : (i) == 1 ? MXC_BASE_SPI1 : (i) == 2 ? MXC_BASE_SPI2 : 0)