Searched refs:MCUX_FLEXCOMM0_CLK (Results 1 – 15 of 15) sorted by relevance
28 #define MCUX_FLEXCOMM0_CLK MCUX_LPC_CLK_ID(0x01, 0x00) macro
158 case MCUX_FLEXCOMM0_CLK: in mcux_lpc_syscon_clock_control_get_subsys_rate()214 case MCUX_FLEXCOMM0_CLK: in mcux_lpc_syscon_clock_control_get_subsys_rate()
100 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
163 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
158 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
185 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;191 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;201 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
408 clocks = <&clkctl0 MCUX_FLEXCOMM0_CLK>;415 clocks = <&clkctl0 MCUX_FLEXCOMM0_CLK>;426 clocks = <&clkctl0 MCUX_FLEXCOMM0_CLK>;
192 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;198 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;208 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
226 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
191 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
189 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
235 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
224 clocks = <&clkctl1 MCUX_FLEXCOMM0_CLK>;
212 clocks = <&clkctl1 MCUX_FLEXCOMM0_CLK>;
239 clocks = <&clkctl1 MCUX_FLEXCOMM0_CLK>;