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Searched refs:DT_NODELABEL (Results 1 – 25 of 651) sorted by relevance

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/Zephyr-latest/modules/hal_silabs/simplicity_sdk/config/
Dsl_clock_manager_tree_config.h26 (DT_SAME_NODE(DT_CLOCKS_CTLR(DT_NODELABEL(sysclk)), DT_NODELABEL(fsrco)) \
28 : DT_SAME_NODE(DT_CLOCKS_CTLR(DT_NODELABEL(sysclk)), DT_NODELABEL(hfrcodpll)) \
30 : DT_SAME_NODE(DT_CLOCKS_CTLR(DT_NODELABEL(sysclk)), DT_NODELABEL(hfxo)) \
32 : DT_SAME_NODE(DT_CLOCKS_CTLR(DT_NODELABEL(sysclk)), DT_NODELABEL(clkin0)) \
41 CONCAT(CMU_SYSCLKCTRL_HCLKPRESC_DIV, DT_PROP(DT_NODELABEL(hclk), clock_div))
44 CONCAT(CMU_SYSCLKCTRL_PCLKPRESC_DIV, DT_PROP(DT_NODELABEL(pclk), clock_div))
48 #if DT_NUM_CLOCKS(DT_NODELABEL(traceclk)) == 0
54 (DT_SAME_NODE(DT_CLOCKS_CTLR(DT_NODELABEL(traceclk)), DT_NODELABEL(sysclk)) \
56 : DT_SAME_NODE(DT_CLOCKS_CTLR(DT_NODELABEL(traceclk)), DT_NODELABEL(hfrcodpllrt)) \
58 : COND_CODE_1(DT_NODE_EXISTS(DT_NODELABEL(hfrcoem23)), ( \
[all …]
Dsl_clock_manager_oscillator_config.h15 #define SL_CLOCK_MANAGER_HFXO_EN DT_NODE_HAS_STATUS(DT_NODELABEL(hfxo), okay)
16 #define SL_CLOCK_MANAGER_HFXO_MODE DT_ENUM_IDX(DT_NODELABEL(hfxo), mode)
17 #define SL_CLOCK_MANAGER_HFXO_FREQ DT_PROP(DT_NODELABEL(hfxo), clock_frequency)
18 #define SL_CLOCK_MANAGER_HFXO_CTUNE DT_PROP(DT_NODELABEL(hfxo), ctune)
19 #define SL_CLOCK_MANAGER_HFXO_PRECISION DT_PROP(DT_NODELABEL(hfxo), precision)
23 #define SL_CLOCK_MANAGER_LFXO_EN DT_NODE_HAS_STATUS(DT_NODELABEL(lfxo), okay)
24 #define SL_CLOCK_MANAGER_LFXO_MODE (DT_ENUM_IDX(DT_NODELABEL(lfxo), mode) << _LFXO_CFG_MODE_SHIFT)
26 #define SL_CLOCK_MANAGER_LFXO_CTUNE DT_PROP(DT_NODELABEL(lfxo), ctune)
27 #define SL_CLOCK_MANAGER_LFXO_PRECISION DT_PROP(DT_NODELABEL(lfxo), precision)
29 (DT_ENUM_IDX(DT_NODELABEL(lfxo), timeout) << _LFXO_CFG_TIMEOUT_SHIFT)
[all …]
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h67 #define STM32_CLOCK_CONTROL_NODE DT_NODELABEL(rcc)
71 #define STM32_AHB_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb_prescaler)
72 #define STM32_APB1_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb1_prescaler)
73 #define STM32_APB2_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb2_prescaler)
74 #define STM32_APB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb3_prescaler)
75 #define STM32_APB5_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb5_prescaler)
76 #define STM32_APB7_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb7_prescaler)
77 #define STM32_AHB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb3_prescaler)
78 #define STM32_AHB4_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb4_prescaler)
79 #define STM32_AHB5_PRESCALER DT_PROP_OR(DT_NODELABEL(rcc), ahb5_prescaler, 1)
[all …]
Dadi_max32_clock_control.h40 #define ADI_MAX32_SYSCLK_PRESCALER DT_PROP_OR(DT_NODELABEL(gcr), sysclk_prescaler, 1)
42 #define ADI_MAX32_CLK_IPO_FREQ DT_PROP(DT_NODELABEL(clk_ipo), clock_frequency)
43 #define ADI_MAX32_CLK_ERFO_FREQ DT_PROP_OR(DT_NODELABEL(clk_erfo), clock_frequency, 0)
44 #define ADI_MAX32_CLK_IBRO_FREQ DT_PROP(DT_NODELABEL(clk_ibro), clock_frequency)
45 #define ADI_MAX32_CLK_ISO_FREQ DT_PROP_OR(DT_NODELABEL(clk_iso), clock_frequency, 0)
46 #define ADI_MAX32_CLK_INRO_FREQ DT_PROP(DT_NODELABEL(clk_inro), clock_frequency)
47 #define ADI_MAX32_CLK_ERTCO_FREQ DT_PROP(DT_NODELABEL(clk_ertco), clock_frequency)
48 #define ADI_MAX32_CLK_IPLL_FREQ DT_PROP_OR(DT_NODELABEL(clk_ipll), clock_frequency, 0)
49 #define ADI_MAX32_CLK_EBO_FREQ DT_PROP_OR(DT_NODELABEL(clk_ebo), clock_frequency, 0)
51 #define ADI_MAX32_CLK_EXTCLK_FREQ DT_PROP_OR(DT_NODELABEL(clk_extclk), clock_frequency, 0)
[all …]
/Zephyr-latest/drivers/clock_control/
Dclock_control_ifx_cat1.c17 #define GET_CLK_SOURCE_ORD(N) DT_DEP_ORD(DT_CLOCKS_CTLR_BY_IDX(DT_NODELABEL(N), 0))
21 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(clk_imo))
25 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(clk_iho))
29 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(path_mux0))
33 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(path_mux1))
37 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(path_mux2))
41 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(path_mux3))
45 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(path_mux4))
49 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(clk_hf0))
53 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(clk_hf1))
[all …]
/Zephyr-latest/soc/nxp/imx/imx9/imx93/a55/
Dmmu_regions.c13 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
14 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
17 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
18 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
21 MMU_REGION_FLAT_ENTRY("CCM", DT_REG_ADDR(DT_NODELABEL(ccm)), DT_REG_SIZE(DT_NODELABEL(ccm)),
24 MMU_REGION_FLAT_ENTRY("ANA_PLL", DT_REG_ADDR(DT_NODELABEL(ana_pll)),
25 DT_REG_SIZE(DT_NODELABEL(ana_pll)),
28 MMU_REGION_FLAT_ENTRY("IOMUXC", DT_REG_ADDR(DT_NODELABEL(iomuxc)),
29 DT_REG_SIZE(DT_NODELABEL(iomuxc)),
39 MMU_REGION_FLAT_ENTRY("MU2_A", DT_REG_ADDR(DT_NODELABEL(mu2_a)),
[all …]
/Zephyr-latest/soc/nxp/rw/
Dpower.c31 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pin0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pin1))
35 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pin0))
38 uint8_t level = ~(DT_ENUM_IDX(DT_NODELABEL(pin0), wakeup_level)) & 0x1; in pin0_isr()
41 NVIC_ClearPendingIRQ(DT_IRQN(DT_NODELABEL(pin0))); in pin0_isr()
42 DisableIRQ(DT_IRQN(DT_NODELABEL(pin0))); in pin0_isr()
43 POWER_DisableWakeup(DT_IRQN(DT_NODELABEL(pin0))); in pin0_isr()
47 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pin1))
50 uint8_t level = ~(DT_ENUM_IDX(DT_NODELABEL(pin1), wakeup_level)) & 0x1; in pin1_isr()
53 NVIC_ClearPendingIRQ(DT_IRQN(DT_NODELABEL(pin1))); in pin1_isr()
54 DisableIRQ(DT_IRQN(DT_NODELABEL(pin1))); in pin1_isr()
[all …]
Dsoc.c142 #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(os_timer), nxp_os_timer, okay) in clock_init()
146 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(wwdt), nxp_lpc_wwdt, okay)) in clock_init()
164 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay)) && CONFIG_SERIAL in clock_init()
168 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm1), nxp_lpc_usart, okay)) && CONFIG_SERIAL in clock_init()
172 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm2), nxp_lpc_usart, okay)) && CONFIG_SERIAL in clock_init()
176 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm3), nxp_lpc_usart, okay)) && CONFIG_SERIAL in clock_init()
180 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm14), nxp_lpc_usart, okay)) && CONFIG_SERIAL in clock_init()
186 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_i2c, okay)) && CONFIG_I2C in clock_init()
189 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm1), nxp_lpc_i2c, okay)) && CONFIG_I2C in clock_init()
192 #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm2), nxp_lpc_i2c, okay)) && CONFIG_I2C in clock_init()
[all …]
/Zephyr-latest/tests/subsys/pm/device_driver_init/src/
Dmain.c39 DEVICE_STATE_IS(DT_NODELABEL(test_reg), PM_DEVICE_STATE_ACTIVE); in ZTEST()
40 DEVICE_STATE_IS(DT_NODELABEL(test_reg_chained), PM_DEVICE_STATE_ACTIVE); in ZTEST()
41 POWER_GPIO_CONFIG_IS(DT_NODELABEL(test_reg), GPIO_OUTPUT_HIGH); in ZTEST()
42 POWER_GPIO_CONFIG_IS(DT_NODELABEL(test_reg_chained), GPIO_OUTPUT_HIGH); in ZTEST()
46 DEVICE_STATE_IS(DT_NODELABEL(test_reg_chained_auto), PM_DEVICE_STATE_SUSPENDED); in ZTEST()
47 DEVICE_STATE_IS(DT_NODELABEL(test_reg_auto), PM_DEVICE_STATE_SUSPENDED); in ZTEST()
48 POWER_GPIO_CONFIG_IS(DT_NODELABEL(test_reg_chained_auto), GPIO_OUTPUT_LOW); in ZTEST()
49 POWER_GPIO_CONFIG_IS(DT_NODELABEL(test_reg_auto), GPIO_OUTPUT_LOW); in ZTEST()
53 DEVICE_STATE_IS(DT_NODELABEL(test_reg_auto_chained), PM_DEVICE_STATE_OFF); in ZTEST()
54 DEVICE_STATE_IS(DT_NODELABEL(test_reg_auto_chained_auto), PM_DEVICE_STATE_OFF); in ZTEST()
[all …]
/Zephyr-latest/soc/nxp/imx/imx6sx/
Dsoc.c26 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart1)) in SOC_RdcInit()
30 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart2)) in SOC_RdcInit()
34 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart3)) in SOC_RdcInit()
38 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart4)) in SOC_RdcInit()
42 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart5)) in SOC_RdcInit()
46 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart6)) in SOC_RdcInit()
50 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio1)) in SOC_RdcInit()
54 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio2)) in SOC_RdcInit()
58 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio3)) in SOC_RdcInit()
62 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio4)) in SOC_RdcInit()
[all …]
/Zephyr-latest/soc/intel/intel_socfpga/agilex5/
Dmmu_regions.c12 DT_REG_ADDR(DT_NODELABEL(clock)),
13 DT_REG_SIZE(DT_NODELABEL(clock)),
18 DT_REG_ADDR(DT_NODELABEL(sysmgr)),
19 DT_REG_SIZE(DT_NODELABEL(sysmgr)),
23 DT_REG_ADDR_BY_IDX(DT_NODELABEL(pinmux), 0),
24 DT_REG_SIZE_BY_IDX(DT_NODELABEL(pinmux), 0),
28 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
29 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
33 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
34 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
[all …]
/Zephyr-latest/soc/st/stm32/stm32h7x/
Dsections.ld7 #if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay)
11 #if DT_NODE_HAS_STATUS(DT_NODELABEL(sram3), okay)
12 . = ABSOLUTE(DT_REG_ADDR(DT_NODELABEL(sram3)));
14 . = ABSOLUTE(DT_REG_ADDR(DT_NODELABEL(sram3))) + 256;
16 . = ABSOLUTE(DT_REG_ADDR(DT_NODELABEL(sram3))) + 16K;
17 …GROUP_DATA_LINK_IN(LINKER_DT_NODE_REGION_NAME(DT_NODELABEL(sram3)), LINKER_DT_NODE_REGION_NAME(DT_…
20 . = ABSOLUTE(DT_REG_ADDR(DT_NODELABEL(sram2)));
22 . = ABSOLUTE(DT_REG_ADDR(DT_NODELABEL(sram2))) + 256;
24 . = ABSOLUTE(DT_REG_ADDR(DT_NODELABEL(sram2))) + 16K;
25 …GROUP_DATA_LINK_IN(LINKER_DT_NODE_REGION_NAME(DT_NODELABEL(sram2)), LINKER_DT_NODE_REGION_NAME(DT_…
/Zephyr-latest/boards/nxp/frdm_mcxa156/
Dboard.c69 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(porta)) in frdm_mcxa156_init()
73 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(portb)) in frdm_mcxa156_init()
77 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(portc)) in frdm_mcxa156_init()
81 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(portd)) in frdm_mcxa156_init()
85 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(porte)) in frdm_mcxa156_init()
89 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio0)) in frdm_mcxa156_init()
94 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio1)) in frdm_mcxa156_init()
99 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio2)) in frdm_mcxa156_init()
104 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio3)) in frdm_mcxa156_init()
109 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio4)) in frdm_mcxa156_init()
[all …]
/Zephyr-latest/soc/nxp/imx/imx8m/a53/
Dmmu_regions.c14 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
15 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
19 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
20 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
24 DT_REG_ADDR(DT_NODELABEL(ccm)),
25 DT_REG_SIZE(DT_NODELABEL(ccm)),
29 DT_REG_ADDR(DT_NODELABEL(ana_pll)),
30 DT_REG_SIZE(DT_NODELABEL(ana_pll)),
34 DT_REG_ADDR(DT_NODELABEL(iomuxc)),
35 DT_REG_SIZE(DT_NODELABEL(iomuxc)),
[all …]
/Zephyr-latest/soc/nuvoton/numaker/m2l31x/
Dsoc.c28 #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), hxt) in soc_reset_hook()
30 if (DT_ENUM_IDX(DT_NODELABEL(scc), hxt) == NUMAKER_SCC_CLKSW_ENABLE) { in soc_reset_hook()
34 } else if (DT_ENUM_IDX(DT_NODELABEL(scc), hxt) == NUMAKER_SCC_CLKSW_DISABLE) { in soc_reset_hook()
39 #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), lxt) in soc_reset_hook()
41 if (DT_ENUM_IDX(DT_NODELABEL(scc), lxt) == NUMAKER_SCC_CLKSW_ENABLE) { in soc_reset_hook()
45 } else if (DT_ENUM_IDX(DT_NODELABEL(scc), lxt) == NUMAKER_SCC_CLKSW_DISABLE) { in soc_reset_hook()
60 #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), hirc48m) in soc_reset_hook()
62 if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48m) == NUMAKER_SCC_CLKSW_ENABLE) { in soc_reset_hook()
66 } else if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48m) == NUMAKER_SCC_CLKSW_DISABLE) { in soc_reset_hook()
71 #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), clk_pclkdiv) in soc_reset_hook()
[all …]
/Zephyr-latest/soc/nuvoton/numaker/m46x/
Dsoc.c28 #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), hxt) in soc_reset_hook()
30 if (DT_ENUM_IDX(DT_NODELABEL(scc), hxt) == NUMAKER_SCC_CLKSW_ENABLE) { in soc_reset_hook()
34 } else if (DT_ENUM_IDX(DT_NODELABEL(scc), hxt) == NUMAKER_SCC_CLKSW_DISABLE) { in soc_reset_hook()
39 #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), lxt) in soc_reset_hook()
41 if (DT_ENUM_IDX(DT_NODELABEL(scc), lxt) == NUMAKER_SCC_CLKSW_ENABLE) { in soc_reset_hook()
45 } else if (DT_ENUM_IDX(DT_NODELABEL(scc), lxt) == NUMAKER_SCC_CLKSW_DISABLE) { in soc_reset_hook()
60 #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), hirc48m) in soc_reset_hook()
62 if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48m) == NUMAKER_SCC_CLKSW_ENABLE) { in soc_reset_hook()
66 } else if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48m) == NUMAKER_SCC_CLKSW_DISABLE) { in soc_reset_hook()
71 #if DT_NODE_HAS_PROP(DT_NODELABEL(scc), clk_pclkdiv) in soc_reset_hook()
[all …]
/Zephyr-latest/boards/nxp/frdm_mcxn947/
Dboard.c134 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcan0)) in frdm_mcxn947_init()
153 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm1)) in frdm_mcxn947_init()
158 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm2)) in frdm_mcxn947_init()
163 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm4)) in frdm_mcxn947_init()
168 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm7)) in frdm_mcxn947_init()
173 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(os_timer)) in frdm_mcxn947_init()
177 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio0)) in frdm_mcxn947_init()
181 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio1)) in frdm_mcxn947_init()
185 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio2)) in frdm_mcxn947_init()
189 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio3)) in frdm_mcxn947_init()
[all …]
/Zephyr-latest/soc/intel/intel_socfpga/agilex/
Dmmu_regions.c15 DT_REG_ADDR(DT_NODELABEL(sysmgr)),
16 DT_REG_SIZE(DT_NODELABEL(sysmgr)),
20 DT_REG_ADDR(DT_NODELABEL(clock)),
21 DT_REG_SIZE(DT_NODELABEL(clock)),
25 DT_REG_ADDR(DT_NODELABEL(uart0)),
26 DT_REG_SIZE(DT_NODELABEL(uart0)),
30 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
31 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
35 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
36 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
/Zephyr-latest/boards/nxp/frdm_mcxn236/
Dboard.c102 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcan1)) in frdm_mcxn236_init()
121 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm1)) in frdm_mcxn236_init()
126 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm2)) in frdm_mcxn236_init()
131 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm3)) in frdm_mcxn236_init()
136 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm4)) in frdm_mcxn236_init()
141 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm5)) in frdm_mcxn236_init()
146 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(os_timer)) in frdm_mcxn236_init()
150 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio0)) in frdm_mcxn236_init()
154 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio1)) in frdm_mcxn236_init()
158 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio2)) in frdm_mcxn236_init()
[all …]
/Zephyr-latest/drivers/gpio/
Dgpio_mchp_xec.c344 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio_000_036))
350 DT_NODELABEL(gpio_000_036)),
352 .pcr1_base = (uint32_t *) DT_REG_ADDR(DT_NODELABEL(gpio_000_036)),
354 #if DT_IRQ_HAS_CELL(DT_NODELABEL(gpio_000_036), irq)
364 DEVICE_DT_DEFINE(DT_NODELABEL(gpio_000_036),
373 #if DT_IRQ_HAS_CELL(DT_NODELABEL(gpio_000_036), irq) in gpio_xec_port000_036_init()
379 IRQ_CONNECT(DT_IRQ(DT_NODELABEL(gpio_000_036), irq), in gpio_xec_port000_036_init()
380 DT_IRQ(DT_NODELABEL(gpio_000_036), priority), in gpio_xec_port000_036_init()
382 DEVICE_DT_GET(DT_NODELABEL(gpio_000_036)), 0U); in gpio_xec_port000_036_init()
384 irq_enable(DT_IRQ(DT_NODELABEL(gpio_000_036), irq)); in gpio_xec_port000_036_init()
[all …]
/Zephyr-latest/tests/drivers/memc/ram/src/
Dmain.c15 Z_GENERIC_SECTION(LINKER_DT_NODE_REGION_NAME(DT_NODELABEL(label)))
35 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sdram1))
38 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sdram2))
41 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram1))
44 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram2))
47 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(memc))
51 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ram0))
52 #define RAM_SIZE DT_REG_SIZE(DT_NODELABEL(ram0))
53 static uint32_t *buf_ram0 = (uint32_t *)DT_REG_ADDR(DT_NODELABEL(ram0));
60 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sdram1)) in ZTEST()
[all …]
/Zephyr-latest/soc/nordic/common/
Dnrf54hx_nrf92x_mpu_regions.c10 #define USBHS_BASE DT_REG_ADDR_BY_NAME(DT_NODELABEL(usbhs), core)
11 #define USBHS_SIZE DT_REG_SIZE_BY_NAME(DT_NODELABEL(usbhs), core)
13 #define CAN120_BASE DT_REG_ADDR_BY_NAME(DT_NODELABEL(can120), message_ram)
14 #define CAN120_SIZE DT_REG_SIZE_BY_NAME(DT_NODELABEL(can120), message_ram) + \
15 DT_REG_SIZE_BY_NAME(DT_NODELABEL(can120), m_can)
17 #define CAN121_BASE DT_REG_ADDR_BY_NAME(DT_NODELABEL(can121), message_ram)
18 #define CAN121_SIZE DT_REG_SIZE_BY_NAME(DT_NODELABEL(can121), message_ram) + \
19 DT_REG_SIZE_BY_NAME(DT_NODELABEL(can121), m_can)
31 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usbhs))
35 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(can120))
[all …]
/Zephyr-latest/soc/intel/intel_adsp/ace/include/
Dadsp_memory.h15 #define L2_SRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram0)))
16 #define L2_SRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram0)))
18 #define L2_VIRTUAL_SRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram0virtual)))
19 #define L2_VIRTUAL_SRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram0virtual)))
21 #define LP_SRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
22 #define LP_SRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
33 #define L3_MEM_BASE_ADDR (DT_REG_ADDR(DT_NODELABEL(imr1)))
34 #define L3_MEM_SIZE (DT_REG_SIZE(DT_NODELABEL(imr1)))
35 #define L3_MEM_PAGE_SIZE (DT_PROP(DT_NODELABEL(imr1), block_size))
80 #define ADSP_L1CC_ADDR (DT_REG_ADDR(DT_NODELABEL(l1ccap)))
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/Zephyr-latest/drivers/pinctrl/
Dpinctrl_ifx_cat1.c23 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt0)),
24 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt1)),
25 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt2)),
26 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt3)),
27 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt4)),
28 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt5)),
29 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt6)),
30 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt7)),
31 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt8)),
32 GPIO_PORT_OR_NULL(DT_NODELABEL(gpio_prt9)),
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Dpinctrl_stm32.c50 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioa)),
51 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiob)),
52 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioc)),
53 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiod)),
54 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioe)),
55 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiof)),
56 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiog)),
57 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioh)),
58 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioi)),
59 DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioj)),
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