Searched refs:ADI_MAX32_PRPH_CLK_SRC_PCLK (Results 1 – 15 of 15) sorted by relevance
171 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;180 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;189 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;206 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;228 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;247 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;266 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;285 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
27 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;94 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;115 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;155 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;169 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
65 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;85 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;125 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;139 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
29 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;112 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
105 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;119 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
156 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;166 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
70 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;161 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
90 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
59 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
16 #define ADI_MAX32_PRPH_CLK_SRC_PCLK 0 /* Peripheral clock */ macro
64 case ADI_MAX32_PRPH_CLK_SRC_PCLK: in api_get_rate()
100 ((clk_src) == ADI_MAX32_PRPH_CLK_SRC_PCLK ? ADI_MAX32_PCLK_FREQ \
264 DT_INST_PROP_OR(_num, clock_source, ADI_MAX32_PRPH_CLK_SRC_PCLK), \
327 DT_INST_PROP_OR(_num, clock_source, ADI_MAX32_PRPH_CLK_SRC_PCLK), \
440 DT_INST_PROP_OR(_num, clock_source, ADI_MAX32_PRPH_CLK_SRC_PCLK), \
